Originally posted 12 October 2026 by the employer.
About the role
What you'll do
- Lead end-to-end execution of multiple Data Center GPU / MI package design programs, ensuring schedule, quality, and cost targets.
- Drive execution in dynamic environments, managing competing priorities across programs.
- Establish and maintain robust execution frameworks, including milestone tracking, risk management, and readiness gates.
- Interface with senior leadership to provide clear program status, risks, and mitigation strategies.
- Lead, mentor, and grow a high-performing team of package design engineers across geographies.
- Collaborate with silicon, SI/PI, thermal, mechanical, and manufacturing teams to ensure design convergence.
What you'll need
- Experience in semiconductor package design, with strong focus on high-performance or data center products.
- Proven experience leading teams and executing multiple concurrent complex projects.
- Strong understanding of package layout, high-speed design considerations, and multi-die integration.
- Experience working with OSATs, substrate vendors, and manufacturing partners.
- B.S. or higher in Electrical Engineering, Computer Engineering, Mechanical Engineering, or related field.
Nice to have
- Experience with AI/ML applications in engineering workflows (design automation, data analytics, optimization).
- Hands-on experience with industry tools such as Synopsys 3DICC, Cadence SiP / APD or equivalent.
- Experience in Data Center GPU, HPC, or advanced packaging technologies (e.g., chiplets, 2.5D/3D integration).
Skills: Data Center GPU, MI programs, multi-die integration, 2.5D/3D integration, chiplets
This role has been open 2 days — well below the 43-day median for Chiplet/Advanced Packaging Design roles.
Chiplet/Advanced Packaging Design · Advanced Packaging
|
Open roles in category
69
|
Median days open
43 d
|
Median salary
$165k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (69 roles · 26 employers) |
|---|---|---|
| Open roles in this specialty | 9 | 69 |
| Median days open | 41 d | 43 d (−2 d vs this employer) |
| Median salary (USD postings) | — | $165k |
Skills observed across this category: Data Center GPU, MI programs, multi-die integration, 2.5D/3D integration, chiplets
Who's hiring in this category
- Micron Technology · 10 open roles · median 166 d
- AMD (this employer) · 9 open roles · median 41 d
- NVIDIA · 6 open roles · median 37 d
- Marvell Technology · 5 open roles · median 34 d
- Broadcom · 4 open roles · median 137 d
- GlobalFoundries · 4 open roles · median 105 d
How we counted: 69 open Chiplet/Advanced Packaging Design (Advanced Packaging) roles from 26 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.
Similar Jobs
Career Accelerator Program - Packaging Engineer - PhD - Santa Clara, CA, United States
Texas Instruments · Santa Clara, CA, United States
Staff Advanced Packaging/Process Engineer of R&D - USA - CA - San Jose (Ridder), United States
Lumentum · USA - CA - San Jose (Ridder), United States