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Teradyne

Sr. Hardware Engineer (Compute Test, Agoura Hills)

Teradyne Agoura Hills, CA, United States 1 month ago
Verification, Validation & Test

$141,400 - $226,200 USD yearly

Originally posted 9 September 2026 by the employer.

About the role

This role involves leading and contributing to the design, development, and testing of digital instrumentation within the Digital Instrumentation team.

What you'll do

  • Lead and mentor hardware engineers, providing technical guidance and architectural direction.
  • Actively contribute to the design, development, and testing of PCBs and PCBAs.
  • Oversee PCB layout, schematic design, and component selection.
  • Oversee hardware development projects from concept to production, ensuring timelines and deliverables are met.
  • Collaborate with cross-functional teams including firmware, software, and mechanical engineering.
  • Identify and implement improvements in hardware design, testing, and manufacturing processes.

What you'll need

  • 7+ years of hands-on experience in hardware engineering with a strong background in digital circuit instrument design.
  • 3+ years in a leadership role, combining technical contribution and team leadership.
  • Strong understanding of electrical and electronic principles, circuit design, and signal integrity.
  • Experience with hardware debugging tools (oscilloscopes, logic analyzers, multimeters).
  • Knowledge of industry standards and best practices related to hardware design, testing, and quality assurance.
  • Experience with high-speed PCB design and complex multi-layer designs.
  • Strong understanding of SERDES technology and protocols (e.g., PCIe, 100G Ethernet).
Market context

This role has been open 25 days — below the 27-day median for Silicon Test Engineering roles.

Silicon Test Engineering · DFT Test

Open roles in category
526
Median days open
27 d
Median salary
$169k
See the full market breakdown ▾Category comparison, and who else is hiring
How Teradyne compares in Silicon Test Engineering hiring
Metric Teradyne All employers we track in this specialty (526 roles · 76 employers)
Open roles in this specialty 68 526
Open roles in the wider Silicon Validation & Test family 85 2199 · 111 employers
Median days open 25 d 27 d (−2 d vs this employer)
Median salary (USD postings) — $169k

Who's hiring in this category

  • Teradyne (this employer) · 67 open roles · median 25 d
  • Renesas Electronics · 41 open roles · median 25 d
  • Infineon Technologies · 39 open roles · median 35 d
  • Micron Technology · 28 open roles · median 34 d
  • AMD · 26 open roles · median 40 d
  • Qualcomm · 25 open roles · median 27 d

How we counted: 526 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 13 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
Agoura Hills, CA, United States
On-site
$141,400 - $226,200 USD yearly
1 month ago

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