SR ENGINEER, HIG HBM SOC VERIFICATION - Richardson, TX, United States
Originally posted 15 October 2026 by the employer.
Work on HBM architectures for memory and storage solutions.
About the role
This role involves developing and verifying complex System-on-Chip (SoC) designs, focusing on High Bandwidth Memory (HBM) products and architectures.
What you'll do
- Develop test plans at SoC level and analyze coverage.
- Build verification environments for complex SoCs.
- Develop random and directed tests in RTL and gate-level simulation environments.
- Review architectural specifications to ensure quality.
- Work with customers to understand verification and validation requirements.
- Debug and identify root causes for pre-silicon and post-silicon issues in HBM products.
What you'll need
- Bachelor’s degree in Electrical and Computer Engineering or a related field and 3 years of experience in SoC or IP verification.
- Writing tests and developing verification environments using System Verilog and UVM.
- Building verification environments or validating complex SoCs.
- Working with IP vendors and verifying IP integration.
- Gate-level simulation (GLS).
- Python.
- Experience with UCIE, memory controller, NOCs, MBIST, or ATPG scan controllers.
- Knowledge of DRAM operation and JEDEC specifications such as HBM product family.
Skills: SoC verification, System Verilog, UVM, HBM, memory controller, gate-level simulation
This role has been open 1 day — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1195
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (1195 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 42 | 1195 |
| Open roles in the wider Digital Design & Verification family | 103 | 3198 · 115 employers |
| Median days open | 80 d | 64 d (+16 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: SoC verification, System Verilog, UVM, HBM, memory controller, gate-level simulation
Who's hiring in this category
- Qualcomm · 109 open roles · median 37 d
- AMD · 97 open roles · median 51 d
- NVIDIA · 84 open roles · median 58 d
- Synopsys · 63 open roles · median 31 d
- SiFive · 55 open roles · median 73 d
- Arm Holdings · 49 open roles · median 101 d
How we counted: 1195 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.