Sr Engineer, Compiler - Kodaira, Japan
Originally posted 18 September 2026 by the employer — open 0 days.
About the role
Your work will directly impact how AI workloads are translated into highly optimized, safe, and power-efficient execution on Renesas hardware, including advanced 3 nm silicon for software-defined vehicles.
What you'll do
- Lead AI compiler architecture across model ingestion, graph optimization, lowering, code generation, and runtime integration
- Design and implement graph-level optimizations (operator fusion, quantization-aware rewrites, memory-aware scheduling, partitioning)
- Drive performance optimization for target NPUs, including tiling, tensor layout, and multi-core execution strategies
- Partner with SoC and AI accelerator architects to influence hardware features through compiler insights
- Own performance KPIs for real automotive AI workloads using simulators, profilers, and silicon-correlated models
- Ensure compiler outputs meet automotive requirements (real-time behavior, determinism, quality expectations)
What you'll need
- MS/PhD (or equivalent experience) in Computer Science, EE, or related field
- Deep experience building AI compilers, accelerator backends, or graph optimization frameworks
- Strong expertise in graph optimization and performance optimization for NPUs or custom accelerators
- Experience with MLIR, LLVM, TVM-like systems, or proprietary compiler IRs
- Excellent C/C++ and Python skills
- Solid understanding of AI inference workloads (CNNs, transformers, perception or generative models)
- Strong communication skills
Nice to have
- Experience with automotive or safety-critical systems
- Background in heterogeneous SoCs (CPU/GPU/DSP/NPU)
- Performance modeling or hardware–software co-design experience
Skills: AI compiler architecture, graph optimization, NPU, AI accelerator, automotive AI workloads
This role has been open 0 days — well below the 65-day median for AI/ML Hardware Engineering roles.
AI/ML Hardware Engineering · AI ML Hardware
|
Open roles in category
512
|
Median days open
65 d
|
Median salary
$226k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (512 roles · 77 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 512 |
| Open roles in the wider Software, Firmware & Systems family | 130 | 5856 · 143 employers |
| Median days open | 73 d | 65 d (+8 d vs this employer) |
| Median salary (USD postings) | — | $226k |
Skills observed across this category: AI compiler architecture, graph optimization, NPU, AI accelerator, automotive AI workloads
Who's hiring in this category
- Qualcomm · 105 open roles · median 99 d
- NVIDIA · 85 open roles · median 64 d
- AMD · 42 open roles · median 65 d
- Micron Technology · 32 open roles · median 36 d
- Mobileye · 25 open roles · median 50 d
- Analog Devices · 14 open roles · median 21 d
How we counted: 512 open AI/ML Hardware Engineering (AI ML Hardware) roles from 77 employers tracked in the SemiconductorJobs index, counted 18 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.