Sr. Engineer, Analog Mixed-Signal Design
Analog & Mixed-Signal Design
About the role
This role involves contributing to the design of precision timing circuits leveraging MEMS technology, with applications in high-performance Networking and Communications Infrastructure to ultra-low power Mobile platforms.
What you'll do
- Design analog and mixed-signal circuits meeting architectural requirements and technical specifications.
- Contribute to the architectural definition of the design and chip integration.
- Perform calculations, design and verification simulations for building blocks at schematic level and after post-layout extraction.
- Collaborate with Layout Engineers to validate proper layout using best-known methods.
- Document assigned blocks and lead preliminary and final design review meetings.
- Participate in chip bring-up, evaluation, and characterization with emphasis on owned blocks.
What you'll need
- M.S. in Electrical Engineering or related field with minimum 4 years of experience, or Ph.D. in Electrical Engineering with minimum 2 years of experience.
- Detailed knowledge of CMOS circuits and noise analysis.
- Core expertise in Integer-N and fractional-N PLL (Sigma-Delta and LC), Sigma-Delta ADCs, Temperature sensor, Analog and digital filters, Quartz or MEMS oscillator, Sub-threshold circuits, Low noise regulator and bandgap, or High-speed output drivers.
- Knowledge of programming languages: Matlab, VerilogA, Oceanscript.
- Ability to oversee circuit layout for critical blocks.
- Proficient in using Cadence analog design tools.
Nice to have
- Published research projects prototyped and proven in silicon.
Skills: analog and mixed-signal circuits, architectural definition, verification simulations, post-layout extraction, CMOS circuits, PLL
Market context
This role has been open 57 days — well below the 78-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
170
|
Median days open
78 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | SiTime | Market (170 open roles · 43 companies) |
|---|---|---|
| Open roles in category | 10 | 170 |
| Median days open | 168 d | 78 d (+90 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: analog and mixed-signal circuits, architectural definition, verification simulations, post-layout extraction, CMOS circuits, PLL
Who's hiring in this category
- Analog Devices · 24 open roles · median 118 d
- Infineon Technologies · 13 open roles · median 76 d
- NVIDIA · 12 open roles · median 50 d
- Qualcomm · 10 open roles · median 54 d
- SiTime (this employer) · 10 open roles · median 168 d
- Microchip Technology · 8 open roles · median 167 d
Based on 170 open roles at 43 companies in our index. Snapshot 9 Sept 2026.