Sr. Debug Engineer - PCIe/CXL, RAS, Memory - CA, Santa Clara, United States
Originally posted 4 September 2026 by the employer. Relisted by the employer on 6 October 2026.
Join the team focusing on RAS, PCIe, Memory, MCA, CXL, and Micro-Controller related failures.
About the role
This role involves significant silicon and system engineering expertise towards customer enablement, debug, and root cause resolution, particularly focusing on RAS, PCIe, Memory, MCA, CXL, and Micro-Controller related failures.
What you'll do
- Work on RAS, PCIe, Memory, MCA, CXL, and Micro-Controller related failures with customers.
- Provide validation and debug recommendations to customers.
- Utilize debug tools (e.g., debug scripts, protocol analyzers, SCAN and JTAG tools) to root cause customer failures.
- Debug issues found during process, bring-up, validation, and production phases of SOC programs.
- Engage with other software, hardware, and design teams.
- Lead task forces and collaborate with multiple teams.
What you'll need
- 10+ years of total experience in RAS validation and debug.
- PCIe/CXL functional and protocol (e.g. Gen1~Gen6) debug, including IP bring up, validation, and analysis.
- Memory functional and protocol validation and/or debug.
- MCA/MCE validation and debug.
- Post silicon validation methodologies experience.
- Programming/scripting skills (e.g. Python, C++, Perl, Ruby).
- Experience handling high-speed test and measurement equipment such as protocol analyzer and scope.
- X86 micro architecture experience.
Nice to have
- Experience developing programming languages such as Python scripts.
- Debug techniques and methodologies.
Skills: PCIe, CXL, RAS, Memory, post silicon validation, debug tools
This role has been open 41 days — exactly the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
412
|
Median days open
41 d
|
Median salary
$166k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (412 roles · 61 employers) |
|---|---|---|
| Open roles in this specialty | 59 | 412 |
| Open roles in the wider Silicon Validation & Test family | 151 | 2220 · 112 employers |
| Median days open | 41 d | 41 d (same as this employer) |
| Median salary (USD postings) | — | $166k |
Skills observed across this category: PCIe, CXL, RAS, Memory, post silicon validation, debug tools
Who's hiring in this category
- AMD (this employer) · 58 open roles · median 41 d
- Micron Technology · 39 open roles · median 37 d
- Qualcomm · 37 open roles · median 27 d
- NVIDIA · 25 open roles · median 22 d
- Graphcore · 21 open roles · median 120 d
- Microchip Technology · 20 open roles · median 70 d
How we counted: 412 open Post-Silicon Validation (Silicon Validation) roles from 61 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.