Sr. ATE Test Engineer - Santa Clara, CA, United States
$135,000 - $170,000 USD yearly
This role involves developing ATE production and characterization test programs for Ferric’s mixed-signal ICs.
About the role
As a Ferric IC Test Engineer, you will take full ownership of ATE testing and characterizing Ferric’s mixed-signal ICs.
What you'll do
- Work with IC design and test teams to create and review test plans and test cases, including providing recommendations for DFT & TFQ, test & debug visibility.
- Design and development of ATE HW.
- Develop ATE test program of KGD, and package level testing of Ferric’s PMIC devices.
- Support and execute product qualification.
- Bench-level testing, characterization, and debug of full ICs and IC sub-systems as required.
- Drive engineering vendors for IC product qualification and production testing, including coordination of bench- & wafer-level tests, yield improvement, and test cost reductions.
What you'll need
- Bachelor’s or Master’s Degree in EE.
- 3+ years ATE experience.
- Solid knowledge of ATE test program development and equipment such as Agilent 93K and testing of Power Management IC’s.
- KGD testing experience.
- Experience executing qualification plan.
- Programming Languages: Python.
- Lab experience with equipment including Oscilloscope, Digital Multimeter (DMM), Source Measure Unit (SMU), DC Power Supply Unit (PSU), Electronic Load, Spectrum Analyzer, Opal Kelly.
- Knowledge of DC-DC power-converters/regulators (Buck, Boost, LDO).
- Experience with PCB design and assembly, including component selection and soldering.
Nice to have
- Master’s Degree in EE.
- Experience with statistical data analysis of IC production data, including parametric correlation analysis, yield, and quality improvement.
This role has been open 47 days — slightly above the 39-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
562
|
Median days open
39 d
|
Median salary
$176k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Ferric | All employers we track in this specialty (562 roles · 78 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 562 |
| Open roles in the wider Silicon Validation & Test family | 2 | 2249 · 112 employers |
| Median days open | 47 d | 39 d (+8 d vs this employer) |
| Median salary (USD postings) | — | $176k |
Who's hiring in this category
- Teradyne · 75 open roles · median 31 d
- Infineon Technologies · 45 open roles · median 40 d
- Renesas Electronics · 44 open roles · median 29 d
- Qualcomm · 31 open roles · median 39 d
- Micron Technology · 28 open roles · median 43 d
- Texas Instruments · 28 open roles · median 34 d
How we counted: 562 open Silicon Test Engineering (DFT Test) roles from 78 employers tracked in the SemiconductorJobs index, counted 27 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.