Sr. Analog IC Design Engineer - IVR Architecture Team (Remote) - New York, NY, United States
Analog & Mixed-Signal Design
$135,000 - $170,000 USD yearly
Contribute to building integrated voltage regulators leveraging Ferric’s on-chip inductor technology.
About the role
As a Ferric Analog IC Design Engineer on the IVR Architecture Team, you will have ownership of system architectures, defining specifications for system sub-blocks, and ensuring that the system design meets product target requirements. These products have applications ranging from KW-scale AI processors to ultra-low power Mobile platforms including wearable devices.
What you'll do
- Drive system architecture design to optimize product performance targets such as efficiency, density, load current transient response, input supply rejection, and reference tracking performance for Ferric IVRs.
- Identify specifications for sub-blocks within the overall system given system level requirements.
- Maintain and implement various types of system-level models to pioneer novel power conversion and control solutions.
- Perform system-level simulations and verification with a focus on performance prediction through bench correlation.
- Design, simulation, and layout of analog IPs pertinent to IVRs as needed.
- Champion system level performance goals across design, applications, and testing teams to ensure optimal results.
What you'll need
- MSEE with analog design experience.
- Strong knowledge of control theory and stability analysis.
- Strong knowledge of switching power converter design.
- Deep knowledge of CMOS analog circuit design.
- Knowledge of digital circuit design.
- Experience with custom IC design flows and tools.
Nice to have
- BSEE + 8 years, MSEE + 5 years, or PhD + 2 years experience in power or RF IC design, or related field.
- Experience designing high switching frequency integrated voltage regulators.
- Experience designing ICs in standard CMOS.
- Experience with exotic semiconductors.
- Deep understanding of process and device physics concepts.
- Familiarity with mixed signal verification methodologies.
- Experience with Monte Carlo analysis.
- Familiarity with analog design EDA tools such as Cadence Virtuoso, schematic capture, LVS, DRC, SPICE simulation, parasitic extraction, electromagnetics simulators.
- Experience with bench-level validation, characterization, and debug of full ICs and IC sub-systems.
- Experience with Verilog.
- Experience with Verilog-AMS.
- Experience with Python.
- Experience with Perl.
- Experience with Tcl.
- Experience with Cadence Skill.
- Experience with MATLAB.
Skills: system architecture, switching power converter, CMOS analog circuit, control theory, IVR