$162,400 - $301,600 USD yearly
Deploy and optimize design flows across 2.5D, 3D-IC, silicon interposers, and chiplet-based package architectures using Cadence packaging solutions.
Originally posted 22 October 2026 by the employer.
About the role
Cadence is seeking a Solutions Application Engineer to support customers developing advanced packaging solutions, including 2.5D, 3D-IC, chiplet-based architectures, and heterogeneous integration technologies. The role involves working directly with semiconductor companies, OSATs, foundries, and system companies to deploy and optimize Cadence Advanced Package 3D-IC design flows.
What you'll do
- Provide technical leadership and application support for Cadence 3D-IC design solutions.
- Develop and demonstrate packaging workflows covering organic substrates, silicon interposers, wafer level packaging, 2.5D/3D-IC integration, and chiplet-based package architectures.
- Support customer evaluations, proof-of-concepts, benchmarks, and production deployments.
- Collaborate with sales teams for technical pre-sales support and work with R&D to communicate customer requirements and enhancement requests.
- Support design-signoff methodologies including DRC/LVS, connectivity verification, electrical rule checking, thermal analysis, Signal Integrity (SI), and Power Integrity (PI).
- Develop best practices, application notes, reference flows, and customer success methodologies.
What you'll need
- Bachelor’s degree in Electrical or Electronics Engineering, or related discipline with 8+ years of experience in semiconductor packaging, IC packaging, PCB, substrate, or interposer design.
- Knowledge of advanced package design methodologies, 2.5D and 3D-IC integration, chiplet-based architectures, and package manufacturing and assembly processes.
- Knowledge of high-speed signal design and power delivery networks.
- Experience performing package layout, routing, constraint management, and package signoff.
- Understanding of package stackups, bump planning, escape routing, and substrate technologies.
Nice to have
- Experience with Cadence Integrity 3D-IC Platform.
- Experience with Cadence Sigrity and Clarity 3D Solver.
- Hands-on experience with Cadence Allegro X APD.
- Knowledge of UCIe, HBM, AI accelerator packaging, and heterogeneous integration.
- Experience supporting foundry and OSAT design flows.
- Understanding of semiconductor assembly, reliability, and manufacturing processes.
Skills: 3D-IC, chiplet, interposer, DRC/LVS, signal integrity
More semiconductor jobs: Cadence Design Systems jobs · Field applications engineer jobs
First seen in our index 20 days ago, well below the 42-day median for Applications FAE roles.
Applications FAE · EDA Tools
|
Open roles in category
129
|
Median days since first seen
42 d
|
Category median salary (all employers)
$182k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Cadence Design Systems | All employers we track in this specialty (129 roles · 10 employers) |
|---|---|---|
| Open roles in this specialty | 38 | 129 |
| Median days since first seen | 34 d | 42 d (+8 d vs this employer) |
| Median salary (USD postings) | n/a | $182k |
Skills observed across this category: 3D-IC, chiplet, interposer, DRC/LVS, signal integrity
Who's hiring in this category
- Synopsys · 67 open roles · median 37 d
- Cadence Design Systems (this employer) · 38 open roles · median 35 d
- Keysight Technologies · 10 open roles · median 68 d
- Renesas Electronics · 6 open roles · median 90 d
- AMD · 2 open roles · median 52 d
- ASML · 2 open roles · median 39 d
How we counted: 129 open Applications FAE (EDA Tools) roles from 10 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Days are counted from when our index first saw each posting, not from the employer's original posting date.