Software Virtual Platform/Simulation Sr. Engineer

Originally posted 20 June 2026 by the employer.

About the role

As a Software Virtual Platform Engineer, you will specialize in virtual platforms, including SystemC TLM and QEMU, focusing on developing high-level system virtual models of complex SoC hardware.

What you'll do

- Design and develop SystemC TLM models to accurately represent SoC architectures. - Integrate components such as processors, interconnects, peripherals, and custom IP blocks into the SystemC simulator. - Define software requirements and implement TLM models for complex, large-scale products and systems. - Lead design, coding, and testing efforts to ensure projects meet specifications and schedules. - Perform code reviews and regression tests, triage issues, and implement fixes to maintain code quality. - Collaborate with hardware, systems, and test engineers to understand requirements and translate them into detailed models.

What you'll need

- Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 2+ years of Software Engineering or related experience (or Master's with 1+ year, or PhD). - 2+ years of academic or work experience with programming languages such as C, C++, Java, or Python. - Extensive experience with C programming for model development.

Nice to have

- 12 years of Software/Firmware Engineering or related work experience. - 5 years of experience developing Virtual Platforms or Simulators. - Experience with SystemC TLM or QEMU. - Experience with ARM Architecture (CPU, GIC, CoreSight Debug) and ARM Fast Models. - Firmware and/or Device Driver Development and Debug experience. - Experience with Open-Source Development, Unit Testing, Continuous Integration, and Git Revision Control. - Knowledge of Server Architecture (RAS, Manageability).

Skills: SystemC TLM models, SoC architectures, Virtual Platforms, Firmware and/or Device Driver Development, ARM Architecture