Originally posted 6 August 2026 by the employer.
About the role
What you'll do
- Lead the design and implementation of production-quality Rust components for low-level and performance-sensitive GPU systems. - Help make Rust a first-class engineering language across relevant parts of the GPU software stack, including toolchain integration, libraries, coding standards, diagnostics, testing, and deployment practices. - Design and implement compiler pipelines involving rustc, MIR, target-neutral intermediate representations, MLIR dialects and transformations, LLVM IR, and AMDGPU code generation. - Build analyses, transformations, legalization passes, and target-specific lowering for GPU execution models, memory spaces, synchronization, capabilities, and specialized hardware operations. - Define typed and auditable interfaces across compiler, host runtime, device code, firmware, and hardware boundaries. - Work on ABI definition and validation, argument layout, calling conventions, linker and loader behavior, ELF and code-object metadata, and source-to-binary identity.
What you'll need
- Deep expertise in at least one part of the GPU software stack, with the ability to become productive in unfamiliar areas. - Strong judgment about correctness boundaries, including memory safety, concurrency, ordering, ABI compatibility, device behavior, and compiler transformations. - Ability to read technical work, form testable hypotheses, and turn promising ideas into reliable implementations. - Experience working at the intersection of Rust systems programming, production compiler infrastructure, GPU architecture, firmware, program analysis, and formal methods. - Hardware-software co-design experience, especially when compiler, runtime, firmware, or ISA choices must evolve together.
Nice to have
- Strong production Rust experience, including ownership and borrowing, lifetimes, traits and generics, error handling, concurrency, FFI, and the careful design of safe abstractions over unsafe operations. - Experience with low-level or constrained Rust, including no std, embedded systems, firmware, custom targets, allocators, volatile access, interrupt handling, or architecture-specific code. - Strong C or C++ systems programming skills and the ability to work across mixed-language codebases. - Experience with rustc internals, MIR, custom codegen backends, procedural macros, compiler plugins, or other Rust toolchain infrastructure. - Experience with LLVM, MLIR, GCC, or another production compiler framework. - Experience designing intermediate representations, dialects, analyses, optimization passes, legalization, instruction selection, scheduling, or target-specific code generation. - Understanding of compiler correctness issues such as undefined behavior, aliasing, provenance, layout, calling conventions, memory models, and source-to-target semantic preservation. - Ability to read and reason about low-level assembly, ISA encodings, compiler output, and machine-level execution. - Experience with linkers, loaders, ELF or other object formats, code-object metadata, DWARF, LLVM MC, disassembly, post-link analysis, or binary rewriting. - Understanding of GPU execution models, including waves or warps, SIMD/SIMT execution, address spaces, registers, local or shared memory, caches, synchronization, atomics, barriers, and asynchronous operations. - AMDGPU, GCN, RDNA, CDNA, ROCm, HIP, HSA, or AMDGPU LLVM backend experience. - Experience with GPU runtimes, drivers, firmware, embedded processors, device initialization, command processing, queueing, or hardware control paths. - Experience building secure or high-assurance systems that process untrusted inputs or operate across privilege, memory-isolation, or hardware trust boundaries. - Experience with program analysis, abstract interpretation, symbolic execution, model checking, SMT solvers, or formal verification tools such as Verus, Lean, Coq, Isabelle, Dafny, or TLA+. - Experience writing executable specifications, proving state-machine invariants, or validating refinement between source, IR, binaries, simulators, RTL, and hardware. - Strong validation instincts, including adversarial testing, differential testing, property-based testing, fuzzing, reproducible evidence, and careful treatment of assumptions and counterexamples. - Hardware-software co-design experience for ISA features, compiler-visible architecture, memory systems, synchronization, security mechanisms, or specialized compute pipelines. - Technical leadership experience: setting direction, resolving ambiguous cross-layer problems, influencing partner teams, mentoring engineers, and communicating tradeoffs clearly.
Skills: GPU systems, Rust, compilers, runtimes, MLIR, LLVM
This role has been open 73 days — well above the 58-day median for Infrastructure/Platform Software roles.
Infrastructure/Platform Software · GPU Software Stack
|
Open roles in category
230
|
Median days open
58 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (230 roles · 19 employers) |
|---|---|---|
| Open roles in this specialty | 50 | 230 |
| Open roles in the wider Software, Firmware & Systems family | 406 | 6118 · 145 employers |
| Median days open | 60 d | 58 d (+2 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: GPU systems, Rust, compilers, runtimes, MLIR, LLVM
Who's hiring in this category
- NVIDIA · 114 open roles · median 56 d
- AMD (this employer) · 50 open roles · median 60 d
- Intel Corporation · 24 open roles · median 9 d
- Qualcomm · 18 open roles · median 122 d
- Arm Holdings · 5 open roles · median 115 d
- d-Matrix · 2 open roles · median 123 d
How we counted: 230 open Infrastructure/Platform Software (GPU Software Stack) roles from 19 employers tracked in the SemiconductorJobs index, counted 18 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.