$97,800 - $156,400 USD yearly
Originally posted 30 September 2026 by the employer.
About the role
This role involves providing technical support for Cadence EDA tools and internally developed software tools to a global PCB Design workforce responsible for delivering high quality, manufacturable PCB designs that power advanced semiconductor test systems.
What you'll do
- Act as the primary point of contact for technical support to Hardware Engineering and PCB Design Engineers using Cadence software tools, including DE-HDL, System Capture, Allegro, and Sigrity.
- Troubleshoot and resolve software issues by reproducing problems, isolating root causes, and delivering effective solutions.
- Document defects, verify fixes, and submit product improvement requests based on Engineering feedback.
- Create technical documentation and training materials and deliver technical training sessions.
- Participate in testing of new software releases to ensure compatibility with custom environments.
- Identify, diagnose, and implement bug fixes for software issues affecting engineering workflows.
What you'll need
- Bachelor's degree in computer science, electrical engineering, or a related field, or equivalent hands-on experience.
- 1–3 years of professional experience in software support, software engineering, or working with EDA tools.
- Strong familiarity with Cadence PCB tools, including System Capture, Allegro PCB Designer, and/or Sigrity.
- Experience with Unix/Linux environments and basic knowledge of programming languages such as Python, PHP, Perl, Cadence Skill, Tcl/Tk, HTML, Ruby, MySQL.
- Experience using AI solutions to solve engineering tasks.
- Proven troubleshooting and analytical skills.
This role has been open 15 days — well below the 29-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
543
|
Median days open
29 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Teradyne | All employers we track in this specialty (543 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 71 | 543 |
| Open roles in the wider Silicon Validation & Test family | 89 | 2220 · 112 employers |
| Median days open | 23 d | 29 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne (this employer) · 71 open roles · median 23 d
- Renesas Electronics · 44 open roles · median 23 d
- Infineon Technologies · 41 open roles · median 38 d
- Qualcomm · 28 open roles · median 28 d
- Micron Technology · 27 open roles · median 36 d
- Texas Instruments · 24 open roles · median 23 d
How we counted: 543 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.