SoC Systems & Infrastructure Engineer (Design • Validation • Debug • FPGA • Emulation • Software)

Originally posted 10 August 2026 by the employer.

About the role

This role focuses on SoC design, validation, debug, infrastructure, FPGA, and emulation within Qualcomm's engineering teams.

What you'll do

• Develop and enhance solutions supporting SoC design, validation, debug, FPGA prototyping, and emulation environments.
• Design, implement, validate, and debug hardware and software components used in advanced SoC development platforms.
• Perform pre-silicon and post-silicon bring-up, failure analysis, root-cause investigation, and performance characterization.
• Develop automation, infrastructure, and tooling using programming languages and scripting environments.
• Support debugging of low-level hardware and software issues across complex SoC platforms.
• Analyze system performance, power, functionality, reliability, and timing across multiple subsystems.

What you'll need

• Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, or a related technical field.
• Experience in one or more of the following areas: ASIC / SoC Design, Hardware or System Debug, Validation Engineering, FPGA Development, Emulation Platforms, CAD / EDA / Software Development.
• Strong analytical, debugging, and problem-solving skills.
• Ability to work effectively in a collaborative, cross-functional environment.

Nice to have

• Master's or PhD in Computer Engineering, Electrical Engineering, Computer Science, or related field.
• Experience with complex SoC architectures including CPUs, DSPs, GPUs, DDR, NoCs, peripherals, and interconnects.
• Experience with Linux and embedded software development.
• Familiarity with AI-assisted engineering workflows and automation technologies.
• Experience with C/C++, Python, Tcl, Perl.
• Knowledge of Linux / Embedded Linux, Software Design and Development Practices, Automation and Scripting.
• Experience with Hardware Validation, Hardware Debug, Performance and Power Analysis.
• Experience with RTL Design, Verilog / SystemVerilog, FPGA Design.
• Familiarity with JTAG Debug, Git, JIRA, CI/CD Automation Flows.
• Experience with Simulation, Emulation, and Prototyping Tools, Linux Development Environments, Hardware and Software Debug Tools.
• Experience with pre-silicon and post-silicon validation, system integration, silicon debug.
• Strong debugging across SoC architecture, embedded software, firmware, drivers, and hardware interfaces.
• Experience with validation content & framework development, CI/CD pipelines.
• Proficiency in Assembly, device drivers, and bare-metal software development.
• Understanding of memory hierarchy, clock/power management, low-power modes, and performance architecture.
• Experience with system-level validation of bandwidth, latency, QoS, throughput, scalability, and power-performance tradeoffs.
• Experience with simulation, emulation (RUMI/Veloce/FPGA), RTL understanding.
• Experience with JTAG, logic analyzers, oscilloscopes, kernel debuggers, and silicon debug methodologies.
• Experience with platform-level debug, lab equipment usage, JTAG and trace-based debugging, PVT and marginality analysis, AI-assisted debug automation.
• Experience with power characterization, thermal analysis, Vmin/Fmax characterization, CPU/GPU/DDR/NoC analysis, performance optimization, low-power design methodologies.
• Experience with MBIST, ATPG, Structural testing, Yield analysis, Scan-based debug, Silicon characterization.
• Experience with Xilinx and Intel FPGA platforms, FPGA firmware development, Embedded Linux, PCIe, AXI, Ethernet, and I2C protocols.
• Experience with high-speed digital design, clock domain crossing and timing closure.
• Experience with Palladium and Veloce platforms, emulation build generation, platform bring-up.
• Experience with CAD tool development, algorithms and data structures, emulation infrastructure, synthesis optimization, partitioning, clock optimization, compute and storage optimization.