SoC Product Architect, Memory Ecosystem - CA, Santa Clara, United States
Digital Design & SoC Architecture
$320,000 - $488,750 USD yearly
Originally posted 21 June 2026 by the employer.
Drive NVIDIA’s external memory ecosystem across DRAM and non-volatile flash.
About the role
You will drive NVIDIA’s external memory ecosystem across DRAM and non-volatile flash, working with major memory vendors to align roadmaps and co-innovate new technologies.
What you'll do
- Partner with memory vendors to align roadmaps with NVIDIA’s SoC and platform roadmaps.
- Steer vendor roadmaps by articulating NVIDIA’s performance, power, capacity, form-factor, and reliability requirements.
- Innovate new DRAM solutions in collaboration with vendors, exploring novel architectures, signaling, packaging, and power-management techniques.
- Work with SoC architects, memory controller designers, and board/system teams to co-optimize SoC + memory subsystem architecture.
- Represent NVIDIA at vendor technical reviews and roadmap meetings, presenting SoC roadmap needs and performance data.
- Collaborate with sourcing, operations, substrate and PCB design, and quality teams to factor supply, cost, and reliability into memory technology choices.
What you'll need
- MS in Electrical Engineering, Computer Engineering, Physics, or related field, or equivalent experience.
- 18+ years of experience in DRAM / memory subsystem architecture, SoC or memory controller design, or closely related roles in semiconductor or system companies.
- Deep understanding of modern DRAM technologies (e.g., DDR, LPDDR, GDDR, HBM) and non-volatile memories (e.g., NAND flash, managed NAND/SSD).
- Proven experience working directly with memory vendors on product definition, bring-up, or co-development.
- Solid background in SoC and system memory subsystems, including memory controllers, PHYs, signal integrity, and power delivery.
- Demonstrated ability to perform competitive analysis, including interpreting teardown data and benchmarking memory bandwidth/latency.
Skills: memory ecosystem, DRAM, non-volatile flash, SoC architecture, memory controller design