$109,400 - $164,200 USD yearly
Originally posted 26 August 2026 by the employer.
About the role
This role delivers power-optimized solutions for chipsets encompassing CPUs, modems, application processors, multi-media engines, and interconnects. Focus areas include multi-media hardware and systems architecture within camera engineering.
What you'll do
- Execute on-target power optimization feature prototyping and waveform analysis.
- Develop power-optimized multi-media HW and systems architecture for SOCs.
- Implement models for power projections, validation, and architectural trade-off analysis.
- Establish use-case and HW core power targets.
- Work with HW/SW design teams to implement and validate power features and targets from concept to implementation.
What you'll need
- Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field.
- Solid foundation in electrical systems engineering and digital logic design.
- Solid understanding of HW micro-architecture of digital systems and the ASIC implementation flow from concept to production.
- Knowledge of system-level aspects of low-power design with ability to model and analyze power at system and core levels.
- Industry experience in power modeling, verification, and simulation tools, camera systems and architecture, video encoder/decoder systems and architecture, or high-level synthesis tools and flow.
Nice to have
- Experience in competitive analysis and machine learning workload analysis.
Skills: power optimization, SoC, power modeling, micro-architecture, ASIC
More semiconductor jobs: Qualcomm jobs · SoC design jobs · San Diego jobs
First seen in our index 78 days ago, the same as the 78-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
495
|
Median days since first seen
78 d
|
Category median salary (all employers)
$230k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (495 roles · 68 employers) |
|---|---|---|
| Open roles in this specialty | 85 | 495 |
| Open roles in the wider Digital Design & Verification family | 423 | 3575 · 121 employers |
| Median days since first seen | 86 d | 78 d (−8 d vs this employer) |
| Median salary (USD postings) | n/a | $230k |
Skills observed across this category: power optimization, SoC, power modeling, micro-architecture, ASIC
Who's hiring in this category
- Qualcomm (this employer) · 79 open roles · median 93 d
- NVIDIA · 68 open roles · median 84 d
- AMD · 41 open roles · median 70 d
- Apple · 32 open roles · median 16 d
- Arm Holdings · 28 open roles · median 15 d
- Micron Technology · 21 open roles · median 111 d
How we counted: 495 open SoC/Chip Architecture (SOC Architecture) roles from 68 employers tracked in the SemiconductorJobs index, counted 12 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there, and is counted in the wider Digital Design & Verification family row. Days are counted from when our index first saw each posting, not from the employer's original posting date.