SOC Power Architect
$174,400 - $285,400 USD yearly
Originally posted 14 September 2026 by the employer.
About the role
As an SOC Power Architect, you will define, model, design, optimize, verify, validate, implement, and document IP development for a variety of high-performance, low-power products.
What you'll do
- Define systems to achieve maximum performance while meeting thermal and power envelopes.
- Design fast DCVS systems for transient response of power delivery.
- Define power and limit systems for optimal system performance while enforcing thermal and electrical limits with minimum software intervention.
- Understand and work on all aspects of power control and limits architecture, microarchitecture, and interactions with system, software, and product teams.
What you'll need
- Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience (or Master's and 5+ years, or PhD and 4+ years).
- 10 years of strong experience in power and limits system.
- Familiarity with UPF and power domain crossing.
- Experience in low power design methodology and clock domain crossing designs.
- Proficiency in Perl and Python scripting.
Nice to have
- Expertise in post-Si debug.
Skills: power and limits system, thermal and electrical constrained performance, DCVS system, power control architecture, low power design methodology
This role has been open 30 days — well below the 79-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
470
|
Median days open
79 d
|
Median salary
$235k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (470 roles · 65 employers) |
|---|---|---|
| Open roles in this specialty | 72 | 470 |
| Open roles in the wider Digital Design & Verification family | 377 | 3191 · 115 employers |
| Median days open | 86 d | 79 d (+7 d vs this employer) |
| Median salary (USD postings) | — | $235k |
Skills observed across this category: power and limits system, thermal and electrical constrained performance, DCVS system, power control architecture, low power design methodology
Who's hiring in this category
- Qualcomm (this employer) · 72 open roles · median 86 d
- NVIDIA · 56 open roles · median 68 d
- Apple · 39 open roles · median 9 d
- AMD · 35 open roles · median 64 d
- Arm Holdings · 27 open roles · median 112 d
- NXP Semiconductors · 21 open roles · median 114 d
How we counted: 470 open SoC/Chip Architecture (SOC Architecture) roles from 65 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.