SOC/IP Integration Engineer (eInfochips Inc) - Remote
Originally posted 20 October 2026 by the employer.
About the role
This role focuses on subsystem and SoC integration, handling 1P and 3P IPs, fabric generation, and handoff for physical design.
What you'll do
- Execute subsystem and SoC integration, including 1P and 3P IP integration, generating 3P fabrics, quality checks, and PD handoff. - Perform subsystem integration using Verilog and SystemVerilog, synthesis, timing constraints, and floor-planning considerations. - Drive performance optimization and design-quality closure, including CDC, Lint, RDC, and register integration. - Ensure customer satisfaction and report daily or weekly technical progress effectively to customers. - Contribute to process improvements and provide informal guidance to junior engineering staff.
What you'll need
- 5–7 years of related experience with a 4-year degree, 3 years with an advanced degree, or equivalent work experience. - Strong understanding of RTL design and digital concepts. - Demonstrated experience in subsystem or SoC integration with Verilog or SystemVerilog. - Proven experience with synthesis, timing constraints, floor-planning considerations, and register integration. - Hands-on execution of design-quality closure checks including CDC, Lint, and RDC.
Skills: SoC integration, RTL, SystemVerilog, synthesis, CDC, Lint
This role has been open 0 days — well below the 62-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1045
|
Median days open
62 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | eInfochips | All employers we track in this specialty (1045 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 1 | 1045 |
| Open roles in the wider Digital Design & Verification family | 7 | 3244 · 116 employers |
| Median days open | 0 d | 62 d (−62 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: SoC integration, RTL, SystemVerilog, synthesis, CDC, Lint
Who's hiring in this category
- Qualcomm · 148 open roles · median 58 d
- Synopsys · 85 open roles · median 34 d
- AMD · 72 open roles · median 40 d
- Analog Devices · 49 open roles · median 52 d
- NVIDIA · 42 open roles · median 62 d
- NXP Semiconductors · 42 open roles · median 88 d
How we counted: 1045 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 20 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.