Soc Engineer (synthesis/timing) -18607
Originally posted 15 September 2026 by the employer — open 4 days.
About the role
This role involves working on ASIC/SOC projects, developing and implementing System Design Solutions using Synopsys EDA tools and IP to solve customer problems.
What you'll do
- Perform Synthesis, LEC, LDRC, GCA, STA, PTPX.
- Develop and implement System Design Solutions using Synopsys EDA tools and IP.
- Contribute to turnkey projects and act as a trusted advisor to customer design.
- Develop innovative solutions to problems and implement them independently.
- Set task-level goals and consistently meet schedules.
What you'll need
- 2 - 4 years of related experience.
- Good knowledge of ASIC/SOC design, synthesis, timing closure.
- Familiarity with Synthesis, LEC, STA flow.
- Familiarity with scripting languages, such as TCL, Perl, Python.
- BS or MS with an EE or related major.
Nice to have
- Experience in low-power, high-performance design, advanced nodes under 12nm.
- Knowledge of RTL, DFT, LDRC, GCA, VCLP, PTPX, IREM.
Skills: Synthesis, LEC, STA, Synopsys EDA tools, timing closure
This role has been open 2 days — well below the 85-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
671
|
Median days open
85 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Synopsys | All employers we track in this specialty (671 roles · 74 employers) |
|---|---|---|
| Open roles in this specialty | 55 | 671 |
| Open roles in the wider Physical Implementation family | 87 | 1371 · 106 employers |
| Median days open | 58 d | 85 d (−27 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: Synthesis, LEC, STA, Synopsys EDA tools, timing closure
Who's hiring in this category
- Cadence Design Systems · 168 open roles · median 147 d
- Synopsys (this employer) · 55 open roles · median 58 d
- NVIDIA · 47 open roles · median 71 d
- Micron Technology · 36 open roles · median 117 d
- Qualcomm · 34 open roles · median 71 d
- Intel Corporation · 29 open roles · median 24 d
How we counted: 671 open EDA/CAD Engineering (EDA Tools) roles from 74 employers tracked in the SemiconductorJobs index, counted 19 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.