SOC Design Verification Engineer-Staff
$140,000 - $210,000 USD yearly
Originally posted 27 August 2026 by the employer.
About the role
This role involves defining, modeling, designing (digital and/or analog), optimizing, verifying, validating, implementing, and documenting IP (block/SoC) development for a variety of high-performance, high-quality, low-power products. This includes creating advanced architectures and system simulations based on system-level requirements.
What you'll do
- Define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development.
- Create advanced architectures, circuit specifications, logic designs, and/or system simulations based on system-level requirements.
- Collaborate across functional teams to develop and execute an implementation strategy that meets system requirements.
- Evaluate complex process flow from high-level design to synthesis, place and route, timing and power use, and verification or custom circuit design/layout flow.
- Utilize tools/applications (e.g., RTL to GDS Flow, Virtuoso) to execute advanced architecture and design of multiple complex blocks/SoC or IC Packages.
- Write and review detailed technical documentation for complex EDA/IP/ASIC projects.
What you'll need
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience, OR Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience, OR PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Nice to have
- Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
- 6 years of ASIC design, verification, validation, integration, or related work experience.
- 2 years of experience with architecture and design tools.
- 2 years of experience with scripting tools and programming languages.
- 2 years of experience with design verification methods.
- 1 year of work experience in a role requiring interaction with senior leadership.
Skills: ASIC design, verification, IP development, system simulations, RTL to GDS Flow
This role has been open 49 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1192
|
Median days open
65 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (1192 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 109 | 1192 |
| Open roles in the wider Digital Design & Verification family | 380 | 3183 · 115 employers |
| Median days open | 36 d | 65 d (−29 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: ASIC design, verification, IP development, system simulations, RTL to GDS Flow
Who's hiring in this category
- Qualcomm (this employer) · 106 open roles · median 42 d
- AMD · 99 open roles · median 55 d
- NVIDIA · 82 open roles · median 57 d
- Synopsys · 63 open roles · median 30 d
- SiFive · 54 open roles · median 72 d
- Cadence Design Systems · 50 open roles · median 114 d
How we counted: 1192 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.