SoC Debug Engineer, Staff
$145,600 - $218,400 USD yearly
Originally posted 28 September 2026 by the employer.
Focus on pre-Si and post-Si debug for Server/Compute/Mobile chipsets.
About the role
This Staff SoC Debug Engineer position involves ensuring the overall quality of SoC silicon within the central SoC digital hardware organization, focusing on pre-Si and post-Si debug for Server/Compute/Mobile chipsets.
What you'll do
- Lead bring-up, debug, and analyze failures at the embedded platform level in both pre-Si and post-Si phases.
- Perform RTL inspection and dive into issues to root cause pre-Si debug and JTAG and Si exposure to root cause post-Si issues.
- Lead initiatives for faster debug at the platform level, including isolating failing components of a system.
- Create and lead debug strategies and plans for partners to more rapidly triage failures to isolate specific components, including PVT and marginality issues.
- Perform real-time debugging and troubleshooting of server hardware, including motherboards, processors, memory, storage devices, power supplies, and networking components.
- Investigate manufacturing defects, determine root causes, and implement corrective actions to improve product quality and reliability.
What you'll need
- 6 years of experience with pre-Si and post-silicon enabling, bring-up, and analyzing failures at the embedded platform level.
- Experience with RTL inspection and understanding of basic RTL.
- Demonstrated experience solving complex debug issues in pre-Si and post-Si phases.
- Experience leading efforts to develop and implement solutions for faster debug at the platform level, including isolating failing components of a system.
- Experience creating debug strategies and plans for partners to rapidly triage failures to isolate specific components, including PVT and marginality issues.
- Experience in SysDebug lead roles to drive complex issues to root-cause.
- Debugging low-level software and hardware issues.
- Debug tools including JTAG.
- Experience using Lab Equipment (Logic Analyzer, Scope, Signal Generator etc.).
Nice to have
- Strong programming and scripting languages (C, Assembly, Perl, Python, etc.).
- Good understanding of power and performance.
- Strong knowledge of TCU, PVT, Fmax, Vmin test methodology and hands-on experience.
- Understanding of CPU and SoC architectures for Server/Compute/Mobile chipsets.
- Hands-on experience in handling server-specific use-cases, including Server Boot Configuration and Server Reset Scenarios.
- Debug experience of Server Reboot stress scenarios, including both Cold and Warm boot.
- Knowledge of multi-die secure boot flow and debugs involved in multi-die configuration.
Skills: pre-Si and post-Si debug, embedded platform, RTL inspection, JTAG, server hardware
This role has been open 11 days — well below the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
398
|
Median days open
41 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (398 roles · 62 employers) |
|---|---|---|
| Open roles in this specialty | 34 | 398 |
| Open roles in the wider Silicon Validation & Test family | 130 | 2196 · 111 employers |
| Median days open | 28 d | 41 d (−13 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: pre-Si and post-Si debug, embedded platform, RTL inspection, JTAG, server hardware
Who's hiring in this category
- AMD · 57 open roles · median 42 d
- Micron Technology · 39 open roles · median 32 d
- Qualcomm (this employer) · 34 open roles · median 27 d
- NVIDIA · 24 open roles · median 20 d
- Graphcore · 21 open roles · median 115 d
- Microchip Technology · 20 open roles · median 67 d
How we counted: 398 open Post-Silicon Validation (Silicon Validation) roles from 62 employers tracked in the SemiconductorJobs index, counted 10 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.