Signal Integrity Engineer
$111,600 - $167,400 USD yearly
Originally posted 9 October 2026 by the employer.
About the role
This individual contributor role within the CHS Signal Integrity organization is responsible for end-to-end signal integrity and power integrity architecture, analysis, and signoff for mobile, compute, automotive, and connectivity platforms.
What you'll do
- Perform high-frequency measurements of passive structures using VNA and TDR.
- Test, measure, and debug high-speed electrical signals and power delivery on active hardware.
- Drive correlation between pre-silicon models and silicon/lab data.
- Lead debug of eye collapse/jitter margin issues, crosstalk, power noise, and silicon-package-board interactions.
- Drive adoption of best practices across programs.
- Drive improvements in methods for system SI/PI.
What you'll need
- Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field.
Nice to have
- 2 years of experience in Signal Integrity / Power Integrity / High-speed systems.
- Knowledge of Memory: LPDDR4/5/6.
- Knowledge of High-speed IO: PCIe Gen4/5/6/7, USB4, UFS, 10G–112G PHYs.
- Knowledge of Camera/Display: MIPI CSI/DSI.
- Knowledge of System PDN.
Skills: high-frequency measurements, high-speed electrical signals, pre-silicon models, jitter margin, PCIe Gen4/5/6/7, LPDDR4/5/6
This role has been open 0 days — well below the 76-day median for High-Speed IO/SerDes Design roles.
High-Speed IO/SerDes Design · Serdes Highspeed
|
Open roles in category
244
|
Median days open
76 d
|
Median salary
$187k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Qualcomm | All employers we track in this specialty (244 roles · 48 employers) |
|---|---|---|
| Open roles in this specialty | 19 | 244 |
| Open roles in the wider Analog & Mixed-Signal family | 75 | 1416 · 106 employers |
| Median days open | 57 d | 76 d (−19 d vs this employer) |
| Median salary (USD postings) | — | $187k |
Skills observed across this category: high-frequency measurements, high-speed electrical signals, pre-silicon models, jitter margin, PCIe Gen4/5/6/7, LPDDR4/5/6
Who's hiring in this category
- AMD · 32 open roles · median 36 d
- Synopsys · 29 open roles · median 24 d
- Cadence Design Systems · 19 open roles · median 182 d
- Qualcomm (this employer) · 18 open roles · median 60 d
- Micron Technology · 13 open roles · median 69 d
- Apple · 12 open roles · median 10 d
How we counted: 244 open High-Speed IO/SerDes Design (Serdes Highspeed) roles from 48 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.
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