SerDes RTL Design Engineer - CA, San Jose, United States
Originally posted 12 September 2026 by the employer.
Develop high-performance, multi-protocol wireline transceivers in CMOS processes for the AMD SerDes Technology team.
About the role
AMD's SerDes Technology team is hiring an RTL design engineer to develop high-performance, multi-protocol wireline transceivers in CMOS processes.
What you'll do
- Micro-architect high-speed SerDes PHY designs in collaboration with system link architects. - Develop RTL for digital blocks including calibration and adaptation loops, digital signal processing, and clock-data-recovery. - Apply low power design techniques and perform PPA analysis. - Verify intended functionality using block-level test benches and run design checker tools including LINT, CDC, and RDC. - Perform behavioral modeling of custom circuits using Verilog and SystemVerilog. - Support functional verification, design debug, static timing closure, pre-tape out design sign-off, and silicon bring-up.
What you'll need
- Bachelor's or master’s degree in electrical engineering, computer engineering, or a related field. - Proficiency in logic design concepts and RTL coding using Verilog or SystemVerilog. - Proficiency in micro-architecture and developing design specifications. - Experience with design checker tools or functional verification tools. - Knowledge of synthesis flow, static timing analysis, and low power design methodology. - Experience in design with multiple clock domains.
Nice to have
- Experience in mixed signal design. - Experience with Python, Perl, TCL, or other scripting languages. - Experience with SerDes PHY (PMA/PCS) or high-speed I/O protocols.
This role has been open 43 days — well below the 65-day median for Digital/RTL Design roles.
Digital/RTL Design · RTL Design
|
Open roles in category
1077
|
Median days open
65 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1077 roles · 103 employers) |
|---|---|---|
| Open roles in this specialty | 77 | 1077 |
| Open roles in the wider Digital Design & Verification family | 251 | 3310 · 115 employers |
| Median days open | 43 d | 65 d (−22 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 158 open roles · median 62 d
- Synopsys · 87 open roles · median 38 d
- AMD (this employer) · 77 open roles · median 44 d
- Analog Devices · 49 open roles · median 55 d
- NXP Semiconductors · 42 open roles · median 94 d
- NVIDIA · 36 open roles · median 51 d
How we counted: 1077 open Digital/RTL Design (RTL Design) roles from 103 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.