Senior VLSI Methodology Engineer - CA, Santa Clara, United States
$136,000 - $264,500 USD yearly
Originally posted 7 October 2026 by the employer.
This role designs automation that powers library modeling, quality checks, and release for NVIDIA’s PD flows.
About the role
As a Senior VLSI Methodology Engineer, you will design automation that powers library modeling, quality checks, and release for NVIDIA’s Physical Design (PD) flows. This involves building and integrating data-driven pipelines and verification systems for advanced nodes.
What you'll do
- Build scalable systems for quality checking of GPU and SOC libraries.
- Develop automated library analysis, validation, and quality control flows using scripting and EDA tools.
- Collaborate with design teams to integrate library quality systems and enhance cell design methodologies.
- Define and implement guidelines for library modeling, abstraction, and data integrity.
What you'll need
- M.S. in Electrical Engineering or related field (or equivalent experience).
- 4+ years of Library, Physical Design, and/or CAD methodology experience.
- Hands-on development with industry-standard EDA tools (Innovus, Fusion Compiler, Crosscheck, Virtuoso), including scripting, customization, or tool integration.
- Advanced Python, C++, or Perl skills; workflow automation and data pipelines development experience.
Skills: VLSI methodology, library modeling, EDA tools, Python, physical design automation
This role has been open 1 day — well below the 79-day median for EDA/CAD Engineering roles.
EDA/CAD Engineering · EDA Tools
|
Open roles in category
704
|
Median days open
79 d
|
Median salary
$195k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (704 roles · 75 employers) |
|---|---|---|
| Open roles in this specialty | 41 | 704 |
| Open roles in the wider Physical Implementation family | 91 | 1490 · 107 employers |
| Median days open | 73 d | 79 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $195k |
Skills observed across this category: VLSI methodology, library modeling, EDA tools, Python, physical design automation
Who's hiring in this category
- Cadence Design Systems · 163 open roles · median 162 d
- Synopsys · 59 open roles · median 36 d
- Micron Technology · 44 open roles · median 107 d
- Qualcomm · 42 open roles · median 60 d
- NVIDIA (this employer) · 41 open roles · median 73 d
- GlobalFoundries · 30 open roles · median 51 d
How we counted: 704 open EDA/CAD Engineering (EDA Tools) roles from 75 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Physical Implementation family row. Figures refresh nightly.