Senior Virtual Platform Functional Modeling Engineer - TX, Austin, United States
Originally posted 25 August 2026 by the employer.
About the role
As a Virtual Platform Functional Modeling Engineer, you will define and deliver the framework, infrastructure, and methodologies that power AMD's virtual platform capabilities. This technology enables scalable pre-silicon system validation across future CPU, GPU, AI, and adaptive computing platforms.
What you'll do
- Collaborate with firmware, software, validation, and emulation teams to enhance virtual platform capabilities.
- Define and implement inter-node communication behavior within distributed simulation environments.
- Design and improve simulation orchestration services, including job scheduling, synchronization, logging, replay, and deterministic execution.
- Develop model interfaces, adapters, communication frameworks, and platform assembly methodologies.
- Create validation strategies, regression suites, debug infrastructure, trace capabilities, and CI/CD automation.
- Partner with architecture, firmware, software, and system validation teams to align virtual platform functionality with product and platform requirements.
What you'll need
- Experience with functional modeling, virtual platform development, simulation frameworks, firmware enablement, or pre-silicon modeling environments.
- Strong C++ software development skills within modeling, systems software, firmware infrastructure, or platform-level environments.
- Experience developing, integrating, or validating functional models, device models, virtual platforms, or modeling APIs.
- Knowledge of test planning, regression infrastructure, validation methodologies, and CI/CD automation.
- Understanding of SoC and platform architecture, including memory hierarchies, coherency mechanisms, CPU/GPU compute architectures, firmware-visible devices, and high-speed interconnects.
- Familiarity with industry protocols and interconnect technologies such as PCIe, CXL, AXI, CHI, ACE, UCIe, HBM, DDR, or related coherency fabrics.
Nice to have
- Experience using AI-assisted development tools to design, debug, optimize, and maintain complex software frameworks and models.
- Exposure to virtual platform technologies such as SystemC/TLM-2.0, Arm Fast Models, Simics, QEMU, or similar frameworks.
- Experience with virtual platform validation, platform bring-up, protocol testing, fault injection, or hardware/software co-validation.
- Familiarity with large-scale infrastructure environments, including cloud-based and distributed compute platforms.
- Experience establishing reusable modeling methodologies, APIs, debug capabilities, configuration frameworks, or regression automation standards.
Skills: virtual platform, functional modeling, pre-silicon validation, SystemC/TLM-2.0, distributed simulation
This role has been open 51 days — well below the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1192
|
Median days open
65 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | AMD | All employers we track in this specialty (1192 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 97 | 1192 |
| Open roles in the wider Digital Design & Verification family | 255 | 3183 · 115 employers |
| Median days open | 51 d | 65 d (−14 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: virtual platform, functional modeling, pre-silicon validation, SystemC/TLM-2.0, distributed simulation
Who's hiring in this category
- Qualcomm · 106 open roles · median 42 d
- AMD (this employer) · 99 open roles · median 55 d
- NVIDIA · 82 open roles · median 57 d
- Synopsys · 63 open roles · median 30 d
- SiFive · 54 open roles · median 72 d
- Cadence Design Systems · 50 open roles · median 114 d
How we counted: 1192 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.