Senior Technical Program Manager – Silicon Co-Design - CA, Santa Clara, United States
$200,000 - $322,000 USD yearly
Originally posted 10 September 2026 by the employer.
NVIDIA's Silicon Co-Design Group (SCG) sits at the intersection of architecture, silicon, systems, and manufacturing.
About the role
This role is for a Senior Technical Program Manager to own and shape SoC programs from architecture through tape-out, bring-up, and productization, driving alignment across engineering, operations, and product.
What you'll do
- Define and manage schedules, identify dependencies, and drive alignment from architecture review through tape-out and bring-up.
- Participate in design reviews, flag scope risks, resolve them, and make trade-off calls.
- Act as the main technical link among silicon, systems, software, operations, and marketing to ensure team alignment.
- Identify technical and schedule risks, build mitigations with engineering, and move work forward.
- Capture lessons from finished programs and implement process changes to improve speed, quality, and predictability.
- Coordinate movement, tracking, and availability of silicon, boards, and peripherals for validation and bring-up.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (or equivalent experience).
- 12+ years in technical roles, with at least 5 years in technical program management, driving SoC programs from bring-up through productization.
- Deep, hands-on understanding of SoC bring-up, validation, and productization.
- Ability to work across the silicon–system–software boundary to spot integration risks and drive fixes.
- Proven track record to run development cycles in uncertainty.
- Communication that is precise, direct, and right-sized for the audience.
- On-site in Santa Clara, CA, a minimum of three days per week.
Nice to have
- Experience with AI-style program management tools (e.g., automated status, risk flagging, dependency tracking).
- Experience with AI-assisted logistics tracking to speed bring-up and reduce manual efforts.
- Ability to evaluate and help roll out new AI productivity tools (coding assistants, automated documentation) to improve engineering velocity.
Skills: SoC programs, silicon bring-up, validation, productization, architecture review, tape-out
This role has been open 34 days — well below the 47-day median for Technical Program Management roles.
Technical Program Management · SOC Architecture
|
Open roles in category
175
|
Median days open
47 d
|
Median salary
$219k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (175 roles · 47 employers) |
|---|---|---|
| Open roles in this specialty | 18 | 175 |
| Median days open | 41 d | 47 d (−6 d vs this employer) |
| Median salary (USD postings) | — | $219k |
Skills observed across this category: SoC programs, silicon bring-up, validation, productization, architecture review, tape-out
Who's hiring in this category
- Qualcomm · 26 open roles · median 50 d
- AMD · 20 open roles · median 28 d
- NVIDIA (this employer) · 19 open roles · median 47 d
- Synopsys · 14 open roles · median 44 d
- Arm Holdings · 10 open roles · median 81 d
- Apple · 6 open roles · median 65 d
How we counted: 175 open Technical Program Management (SOC Architecture) roles from 47 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.