Senior Systems Prototyping and Emulation Engineer - CA, Santa Clara, United States

Originally posted 6 October 2026 by the employer. Relisted by the employer on 7 October 2026.

DGX systems connecting multiple ASIC chips together on FPGA prototyping and hardware emulation platforms.

About the role

NVIDIA is looking for a Senior Systems Prototyping and Emulation Engineer to build and optimize FPGA prototypes and hardware emulation environments for GPUs, SOCs, NICs, and Switches. The role supports complex DGX multi-ASIC topologies across synthesis, place-and-route, emulator compilation flows, and pre-silicon software validation.

What you'll do

- Build FPGA prototypes and hardware emulation environments by making RTL FPGA- and emulation-friendly, partitioning designs, and running synthesis, place-and-route, and emulator compilation flows. - Bring up designs on FPGA prototyping and hardware emulation platforms, analyze timing and performance bottlenecks, and generate bitstreams and images. - Release prototypes and emulation environments to internal teams and support pre-silicon software development, firmware bring-up, validation, and debug. - Develop bring-up and testing infrastructure, define configurations, and implement emulation-friendly validation infrastructures including DPI/PLI/SystemC interfaces. - Develop and optimize emulation-friendly C/C++ testbenches and transactors to minimize host-emulator communication bottlenecks and improve throughput. - Collaborate with architects, designers, verification engineers, and software teams to realize multi-ASIC DGX systems on prototyping and emulation platforms.

What you'll need

- BS in Electrical Engineering, Computer Engineering, or related field with 8+ years of experience, or MS with 6+ years of experience in FPGA prototyping or hardware emulation. - Hands-on experience with Synopsys ProtoCompiler or Synplify Premier, Xilinx Vivado, and familiarity with emulation platforms such as Synopsys ZeBu or Siemens Veloce. - Solid knowledge of Verilog, SystemVerilog, digital design concepts, and ASIC design/verification tools such as VCS, Verdi, and GDB. - Understanding of industry-standard protocols including PCIe, CXL, NVLINK, USB, CHI, and CPU-GPU coherency. - Lab FPGA debug experience using tools such as Identify or ChipScope, along with lab equipment including oscilloscopes and logic analyzers. - Expertise developing and optimizing emulation-friendly C/C++ testbenches, transactors, and DPI/PLI/SystemC-based interfaces for hardware emulation platforms.

Nice to have

- Scripting knowledge in Perl, shell, Tcl, or Python. - Experience with memory bring-up of LPDDR5/6, DDR5/6, CXL/PCIe, or high-speed interfaces like USB4/3. - Prior experience with hardware emulation or prototyping platforms (Synopsys HAPS, ZeBu, Siemens Veloce) for a high-performance processor or SOC. - Experience enabling pre-silicon software validation, firmware bring-up, or system-level debug and understanding performance-sensitive validation methodologies for large-scale emulation environments.

Skills: FPGA prototyping, hardware emulation, RTL FPGA-friendly, synthesis, place-and-route, Synopsys ProtoCompiler, Xilinx Vivado