Senior System Validation Engineer - Tel Aviv-Yafo, Tel Aviv District, Israel
Originally posted 16 September 2026 by the employer — open 0 days.
About the role
The position supports the full lifecycle from silicon bring-up through production readiness for AI and data-center applications, integrating CXL, Ethernet, NVLink, PCIe, and UALink semiconductor-based technologies.
What you'll do
- Develop and execute post-silicon functional and system validation from silicon bring-up through production readiness.
- Run PVT, silicon corner, stress, characterization, and qualification testing across a wide range of operating conditions.
- Develop validation tests to verify functionality, performance, stability, power, and operating margins.
- Debug issues across silicon, hardware, firmware, drivers, and system software.
- Validate high-speed interfaces such as PCIe, CXL, Ethernet/SerDes, and DDR, as well as common system interfaces.
- Develop Python scripts and automation to improve validation coverage, regression, and test efficiency.
What you'll need
- B.Sc. or M.Sc. in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
- 6+ years of experience in post-silicon, system, hardware, or product validation.
- Hands-on experience with SoC/silicon bring-up, functional validation, and system-level debug.
- Experience developing and executing validation plans, test cases, and characterization experiments.
- Strong Python scripting and test automation skills.
- Experience validating high-speed interfaces such as PCIe, Ethernet, SerDes, CXL, or DDR.
Nice to have
- Experience with PVT validation, silicon corner testing, characterization, qualification, and margin analysis.
- Experience with server, storage, networking, or AI infrastructure products.
- Familiarity with PCIe/CXL architecture and high-speed SerDes technologies.
- Experience with oscilloscopes, BERTs, protocol analyzers, traffic generators, or similar lab equipment.
- Working knowledge of Python, firmware, Linux, and system-level software debugging.
- Experience with pre-silicon validation, emulation, or hardware prototyping.
Skills: post-silicon validation, system-level debug, silicon bring-up, PVT testing, high-speed interfaces, Python scripting
This role has been open 0 days — well below the 49-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
309
|
Median days open
49 d
|
Median salary
$172k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (309 roles · 60 employers) |
|---|---|---|
| Open roles in this specialty | 8 | 309 |
| Open roles in the wider Silicon Validation & Test family | 18 | 1999 · 108 employers |
| Median days open | 175 d | 49 d (+126 d vs this employer) |
| Median salary (USD postings) | — | $172k |
Skills observed across this category: post-silicon validation, system-level debug, silicon bring-up, PVT testing, high-speed interfaces, Python scripting
Who's hiring in this category
- AMD · 46 open roles · median 41 d
- Qualcomm · 27 open roles · median 76 d
- Micron Technology · 24 open roles · median 19 d
- Graphcore · 19 open roles · median 90 d
- NVIDIA · 17 open roles · median 15 d
- Microchip Technology · 15 open roles · median 44 d
How we counted: 309 open Post-Silicon Validation (Silicon Validation) roles from 60 employers tracked in the SemiconductorJobs index, counted 16 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.