Senior System Integration Engineer, Memory
$196,000 - $310,500 USD yearly
Originally posted 6 August 2026 by the employer.
Drive HBM and LPDDR system integration.
About the role
This role involves owning HBM and LPDDR integration in sophisticated SoCs, covering the full stack including silicon, package, embedded software, testing, and product development, and resolving system-level memory challenges.
What you'll do
- Drive HBM and LPDDR system integration, bringup, characterization, and debug for SoCs.
- Own memory performance, power management, thermal, and reliability closure across silicon, package, board, and firmware.
- Lead post-silicon margining, VF shmoo, eye, and correlation work across voltage, temperature, and frequency.
- Debug and resolve memory training, calibration, SI/PI, and system-level stability issues.
- Define validation, characterization, and issue-tracking plans across chip programs.
What you'll need
- BS or MS in EE/CE or equivalent experience.
- 12+ years in HBM, LPDDR, or high-speed memory systems with hands-on depth in silicon bringup, characterization, and debug at scale.
- Deep command of SI/PI, timing, margining, and memory training behavior.
- Multi-functional fluency to work across design, package, firmware, validation, and product teams.
Nice to have
- PHY controller development experience.
- Familiarity with HBM PHY and controller architecture.
- Experience with HBM3/HBM3E specifics, JEDEC margins, thermal-electrical co-sim, ECC methodology, and power management.
Skills: HBM, LPDDR, system integration, silicon bringup, memory debug
This role has been open 59 days — well below the 69-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
287
|
Median days open
69 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (287 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 287 |
| Median days open | 59 d | 69 d (−10 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: HBM, LPDDR, system integration, silicon bringup, memory debug
Who's hiring in this category
- Micron Technology · 151 open roles · median 86 d
- Synopsys · 27 open roles · median 49 d
- SanDisk · 17 open roles · median 32 d
- Broadcom · 16 open roles · median 50 d
- Qualcomm · 12 open roles · median 149 d
- NVIDIA (this employer) · 7 open roles · median 59 d
How we counted: 287 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.