Senior Staff Test Development Engineer - Irvine, CA, United States
Verification, Validation & Test
Originally posted 17 September 2026 by the employer — open 0 days.
About the role
This role involves developing and optimizing test programs for silicon semiconductor chips within the Operations business group.
What you'll do
- Develop test programs on the Advantest 93K tester platform and design tester hardware for high-speed testing.
- Create documentation for test plans and methodologies to meet product specifications.
- Collaborate with DFT/DFM teams on testability reviews to enhance yield and test methodologies.
- Convert test patterns from design simulation environments to ATE format.
- Lead efforts in test flow optimization, test time reduction, insertion/removals, and yield improvement.
- Release production test programs in collaboration with product engineers.
What you'll need
- Bachelor’s degree in Computer Science, Electrical Engineering, or related fields and 5-10 years of professional experience, or Master's degree with 3-5 years of experience.
- Minimum 6+ years of test program development experience on the Advantest 93K ATE tester platform.
- Demonstrable experience in ATE testing, test methodology, silicon process, DFT/DFM, and high-speed digital testing (4+ years).
- Demonstrable experience with C/C++, Perl, Python, and Linux environment.
Nice to have
- Effective interpersonal, teamwork, and communication skills.
Market context
This role has been open 0 days — well below the 27-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
341
|
Median days open
27 d
|
Median salary
$153k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Marvell Technology | All employers we track in this specialty (341 roles · 66 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 341 |
| Open roles in the wider Silicon Validation & Test family | 32 | 1977 · 109 employers |
| Median days open | 1 d | 27 d (−26 d vs this employer) |
| Median salary (USD postings) | — | $153k |
Who's hiring in this category
- Infineon Technologies · 32 open roles · median 26 d
- Renesas Electronics · 32 open roles · median 29 d
- Qualcomm · 23 open roles · median 19 d
- Micron Technology · 22 open roles · median 17 d
- AMD · 18 open roles · median 25 d
- NVIDIA · 16 open roles · median 22 d
How we counted: 341 open Silicon Test Engineering (DFT Test) roles from 66 employers tracked in the SemiconductorJobs index, counted 17 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.