Originally posted 22 September 2026 by the employer.
About the role
This is a Product Engineering role with technical program ownership for power/analog products from concept through production release and sustaining. You will be the single point of accountability for products through first silicon, characterization, qualification, and production release.
What you'll do
- Represent product, test, and package requirements in design reviews.
- Own package and thermal selection and the package development and qualification plan.
- Own the NPI schedule, milestone gates, and cross-functional risk register from concept through production release.
- Own product cost, including die size, yield entitlement, test time, package, and the unit-cost roadmap.
- Own qualification planning and execution in accordance with JEDEC and AEC-Q100 requirements.
- Monitor production data and apply statistical analysis to identify and correct yield, quality, and test-time deficiencies; drive yield improvement.
What you'll need
- Bachelor's degree in electronics, electrical, materials, or physics engineering.
- 10+ years of semiconductor experience spanning product engineering, NPI, manufacturing, and test, or 8+ years with an advanced degree.
- Concept-to-mass-production ownership of at least one product.
- Power or analog product experience with high-voltage or high-current devices, drivers, regulators, or power management.
- Strong grasp of analog and power device behavior, including driver stages, regulators, references, and protection circuits.
- Practical understanding of wafer fabrication, assembly, test, qualification, and production-release flows.
- Familiarity with JEDEC and AEC-Q100 qualification standards, qualification hardware and software, and failure analysis methods.
- Experience managing engineering wafer starts, prototype builds, customer samples, inventory, and product BOMs.
- Fluency with data and statistical methods for managing yield, quality, cycle time, and operational priorities.
Nice to have
- Automotive power/analog experience, including AEC-Q100 Grade 1 or 0, tri-temp production test, IATF 16949, and PPAP environments.
- ISO 26262 exposure, including production screens and characterization traced to FMEDA claims, and safety-related release evidence.
- Experience with a multi-variant die (bond-out or package derivatives sharing one base silicon).
- Thermal modeling and SOA analysis experience for power devices.
- PLM and yield-management tooling such as Agile, PDF Exensio, or JMP.
- Experience with a product from first silicon through a fab or OSAT transfer.
Skills: NPI, qualification planning, production data monitoring, AEC-Q100, functional-safety
More semiconductor jobs: Renesas Electronics jobs · Product engineer jobs · India jobs
This role has been open 44 days — well below the 80-day median for Product Engineering roles.
Product Engineering · Power Management
|
Open roles in category
38
|
Median days open
80 d
|
Category median salary (all employers)
—
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (38 roles · 15 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 38 |
| Open roles in the wider Silicon Validation & Test family | 108 | 2383 · 120 employers |
| Median days open | 44 d | 80 d (−36 d vs this employer) |
| Median salary (USD postings) | — | — |
Skills observed across this category: NPI, qualification planning, production data monitoring, AEC-Q100, functional-safety
Who's hiring in this category
- Infineon Technologies · 8 open roles · median 45 d
- Renesas Electronics (this employer) · 5 open roles · median 44 d
- Vishay Intertechnology · 4 open roles · median 103 d
- Navitas Semiconductor · 3 open roles · median 21 d
- Nexperia · 3 open roles · median 91 d
- onsemi · 3 open roles · median 103 d
How we counted: 38 open Product Engineering (Power Management) roles from 15 employers tracked in the SemiconductorJobs index, counted 5 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.