Senior Staff Product Application Engineer-Memory Subsystems - CA, San Jose, United States

Originally posted 9 October 2026 by the employer.

About the role

This role involves driving customer success on memory subsystems across AMD's silicon portfolio, covering DDR and LPDDR generations and their associated memory controllers, Network-on-Chip, and physical interfaces.

What you'll do

• Own escalated customer support issues for memory, from early design-in and bring-up through production support.
• Root-cause system memory failures, attributing them across DRAM, board, controller IP, calibration firmware, and silicon.
• Author customer-facing memory documentation, including product guides, user guides, datasheets, and layout guidance.
• Perform DRAM SI/PI and timing measurements, applying PCB layout and routing knowledge for DDR and LPDDR.
• Create experiments and tooling, and write targeted memory tests in C to stress and characterize specific failure modes on real hardware.

What you'll need

• Extensive hands-on experience with memory subsystems in an applications, architecture, design, or validation role.
• Expertise across DDR and LPDDR generations (DDR4/DDR5, LPDDR4/4X/5/5X/6) and fluency in relevant JEDEC specifications.
• Deep knowledge of DRAM, memory controller, and PHY architecture, with experience evaluating and validating RAS features.
• Working knowledge of on-chip interconnect architecture, including Network-on-Chip, and bandwidth and latency budgeting.
• Proven root cause of system-level memory failures, including reading calibration and training firmware and using lab debug tools like oscilloscopes and JTAG.
• Hands-on DRAM SI/PI and timing analysis (measurement on real hardware, eye and margin analysis, and channel simulation with IBIS and IBIS-AMI models).
• Strong C for writing targeted memory test applications, and ability to read architecture specifications, design documentation, and SystemVerilog/Verilog RTL.

Nice to have

• HBM experience.
• Excellent technical writing, with a track record of authoring and publishing customer-facing documentation.
• Demonstrated use of AI in engineering workflows, applying AI/LLM/ML tools to identify design gaps, summarize data, and drive productivity.
• Platform-level signal and power integrity.

Skills: DDR, LPDDR, JEDEC, memory controller, signal integrity, customer support