Senior Staff Engineer, Design Verification - San Jose, California, United States
$189,000 USD yearly
Originally posted 24 March 2026 by the employer.
About the role
As a Senior Staff Engineer, Design Verification at Samsung Semiconductor, you will lead verification for IP blocks of an AI accelerator within the AGI Computing Lab.
What you'll do
- Develop verification infrastructure and automation environments for build, simulation, regression, and triages. - Lead the verification for IP blocks of an AI accelerator in collaboration with architects and RTL engineers. - Create direct or random testbenches, define verification scope and test plans for functional and performance validation, and close verification quality metrics. - Provide documentation of verification strategy and maintain accessible test environments. - Mentor junior engineers when necessary. - Debug failures cross-functionally alongside design, compiler, and simulation engineers.
What you'll need
- Bachelor’s with 15+ years, Master’s with 13+ years, or PhD with 10+ years of industry experience. - Background in SoC or IP verification and testbench development using UVM, System Verilog, C/C++, and scripting languages such as Perl/Python. - Experience verifying at multiple levels of logic from scratch, spanning complex IP blocks, dies, SoCs, to full system testing. - Understanding of RTL and debugging skills. - Background in microarchitecture and computer architecture, preferably in the area of AI accelerators.
Nice to have
- Prior experience with computational logic, interconnect networks, and/or memory systems. - Knowledge of FPGA and emulation platforms.
Skills: design verification, testbench, functional validation, performance validation, RTL engineers
This role has been open 211 days — well above the 66-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1254
|
Median days open
66 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Samsung Semiconductor | All employers we track in this specialty (1254 roles · 96 employers) |
|---|---|---|
| Open roles in this specialty | 4 | 1254 |
| Open roles in the wider Digital Design & Verification family | 14 | 3310 · 115 employers |
| Median days open | 116 d | 66 d (+50 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: design verification, testbench, functional validation, performance validation, RTL engineers
Who's hiring in this category
- Qualcomm · 118 open roles · median 45 d
- AMD · 92 open roles · median 55 d
- NVIDIA · 91 open roles · median 65 d
- Synopsys · 65 open roles · median 41 d
- SiFive · 55 open roles · median 83 d
- Cadence Design Systems · 52 open roles · median 125 d
How we counted: 1254 open Design Verification (Design Verification) roles from 96 employers tracked in the SemiconductorJobs index, counted 26 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.