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Marvell Technology

Senior Staff Engineer, ATE Test Development Engineer - Santa Clara, CA, United States

Marvell Technology Santa Clara, CA, United States 13 days ago
Verification, Validation & Test

Originally posted 22 September 2026 by the employer.

About the role

This role involves developing and enhancing test programs for silicon semiconductor chips to ensure product quality and meet customer specifications. You will work on test programs for internal and external customers on the Advantest 93K tester platform.

What you'll do

  • Develop test programs on the Advantest 93K tester platform and design tester hardware for high-speed testing.
  • Create characterization, production, and wafer sort test programs on the Advantest 93K tester.
  • Produce detailed test plans and test methodologies documentation to meet product specifications.
  • Collaborate with DFT/DFM teams on testability reviews to define and enhance yield and test methodologies.
  • Convert test patterns from design simulation environments to ATE format.
  • Lead efforts in test flow optimization, test time reduction, insertion. removals, and yield improvement, and release production test programs.

What you'll need

  • Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience; or Master's degree in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
  • Minimum 6+ years of test program development experience on the Advantest 93K ATE tester platform.
  • Demonstrable experience in ATE testing, test methodology, silicon process, DFT/DFM, and high-speed digital testing.
  • 4+ years experience with C/C++, Perl, Python, and Linux environment.

Nice to have

  • Experience with SmarTest8
Market context

This role has been open 1 day — well below the 23-day median for Silicon Test Engineering roles.

Silicon Test Engineering · DFT Test

Open roles in category
439
Median days open
23 d
Median salary
$184k
See the full market breakdown ▾Category comparison, and who else is hiring
How Marvell Technology compares in Silicon Test Engineering hiring
Metric Marvell Technology All employers we track in this specialty (439 roles · 70 employers)
Open roles in this specialty 13 439
Open roles in the wider Silicon Validation & Test family 40 2108 · 111 employers
Median days open 1 d 23 d (−22 d vs this employer)
Median salary (USD postings) — $184k

Who's hiring in this category

  • Teradyne · 49 open roles · median 5 d
  • Infineon Technologies · 37 open roles · median 32 d
  • Renesas Electronics · 34 open roles · median 33 d
  • Micron Technology · 26 open roles · median 23 d
  • Qualcomm · 25 open roles · median 20 d
  • AMD · 20 open roles · median 28 d

How we counted: 439 open Silicon Test Engineering (DFT Test) roles from 70 employers tracked in the SemiconductorJobs index, counted 23 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.

Apply now
Santa Clara, CA, United States
On-site
13 days ago

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