Senior/Staff Design Verification Engineer, HBM - Richardson, TX, United States
Originally posted 22 July 2026 by the employer.
High Bandwidth Memory (HBM) solutions utilizing Through Silicon Via (TSV) technology.
About the role
As a Senior/Staff Design Verification Engineer, you will evaluate full-chip and block-level HBM and DRAM circuit designs to ensure functional correctness and performance. The role focuses on verifying high-density memory chips spanning custom digital and RTL2GDS flows within the Heterogeneous Integration Group.
What you'll do
- Evaluate full-chip and block-level HBM and DRAM circuit designs to ensure functional correctness and performance. - Develop verification plans from functional specifications in collaboration with architects and design teams. - Create, enhance, and maintain verification environments, testbenches, test vectors, and regressions. - Increase functional coverage across DRAM architectures and features using verification tools and methodologies. - Debug design issues, support root-cause analysis, track bugs, and drive coverage closure. - Apply mixed-signal and digital verification techniques using industry-standard simulation tools. - Lead verification efforts on assigned projects and mentor verification engineers.
What you'll need
- Bachelor’s degree or equivalent experience in Electrical Engineering, Computer Engineering, or a related field. - Solid understanding of CMOS circuit design fundamentals. - 5 to 7+ years of experience with mixed-signal and/or digital verification methodologies. - Proficiency in SystemVerilog (or equivalent), including SystemVerilog Assertions (SVA), and verification methodologies. - Strong debugging, analytical, and problem-solving skills with effective technical communication abilities.
Nice to have
- Experience with analog and digital simulation tools such as HSPICE, Verilog-HDL, and FINESIM. - Proficiency in scripting languages such as Python or Perl to support verification automation. - Demonstrated technical leadership, including mentoring engineers and influencing verification strategies. - Experience using AI-enabled or Generative AI solutions for verification planning, test development, coverage analysis, and root-cause debugging.
Skills: HBM and DRAM circuit designs, verification environments, testbenches, test vectors, SystemVerilog, mixed-signal and digital verification
This role has been open 191 days — well above the 65-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1259
|
Median days open
65 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (1259 roles · 97 employers) |
|---|---|---|
| Open roles in this specialty | 45 | 1259 |
| Open roles in the wider Digital Design & Verification family | 106 | 3310 · 115 employers |
| Median days open | 104 d | 65 d (+39 d vs this employer) |
| Median salary (USD postings) | — | $185k |
Skills observed across this category: HBM and DRAM circuit designs, verification environments, testbenches, test vectors, SystemVerilog, mixed-signal and digital verification
Who's hiring in this category
- Qualcomm · 120 open roles · median 44 d
- NVIDIA · 93 open roles · median 65 d
- AMD · 92 open roles · median 54 d
- Synopsys · 65 open roles · median 40 d
- SiFive · 55 open roles · median 82 d
- Cadence Design Systems · 52 open roles · median 124 d
How we counted: 1259 open Design Verification (Design Verification) roles from 97 employers tracked in the SemiconductorJobs index, counted 25 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.