Senior Staff Design Verification Engineer - Duluth, United States
Originally posted 1 October 2026 by the employer.
This role focuses on verification of DDR6 memory interface products.
About the role
This role provides technical leadership for the verification of memory interface products for data center, AI, and cloud computing applications. You will drive verification strategy and execution for advanced memory data buffer products, including DDR6.
What you'll do
- Provide technical leadership for verification of complex semiconductor designs at the block and system level.
- Define and drive verification strategies, methodologies, test plans, and coverage approaches.
- Lead the development and optimization of SystemVerilog/UVM verification environments and testbenches.
- Drive verification execution, functional coverage, debugging, and coverage closure.
- Analyze complex verification and design issues, determine root causes, and drive solutions.
- Mentor and provide guidance to verification engineers.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent experience.
- 10+ years of related experience in semiconductor design verification.
- Deep experience in semiconductor design verification, including technical leadership of complex verification efforts.
- Advanced proficiency with SystemVerilog and extensive hands-on experience with UVM (Universal Verification Methodology).
- Experience defining verification strategies and developing verification plans from product and design specifications.
- Strong experience developing, optimizing, and debugging UVM-based verification environments and testbenches.
- Strong experience with functional verification, coverage, checkers, test development, debugging, and coverage closure.
- Demonstrated ability to independently resolve complex technical problems and make verification methodology decisions.
Nice to have
- Experience with DDR4, DDR5, memory interfaces, data buffers, or other high-speed memory technologies.
- Experience leading verification efforts across multiple blocks, features, or engineering groups.
- Experience developing verification methodologies or best practices with applicability beyond an individual project.
Skills: SystemVerilog, UVM, testbenches, functional coverage, coverage closure
This role has been open 14 days — well below the 64-day median for Design Verification roles.
Design Verification · Design Verification
|
Open roles in category
1195
|
Median days open
64 d
|
Median salary
$186k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (1195 roles · 95 employers) |
|---|---|---|
| Open roles in this specialty | 32 | 1195 |
| Open roles in the wider Digital Design & Verification family | 86 | 3204 · 115 employers |
| Median days open | 16 d | 64 d (−48 d vs this employer) |
| Median salary (USD postings) | — | $186k |
Skills observed across this category: SystemVerilog, UVM, testbenches, functional coverage, coverage closure
Who's hiring in this category
- Qualcomm · 109 open roles · median 37 d
- AMD · 97 open roles · median 51 d
- NVIDIA · 84 open roles · median 58 d
- Synopsys · 63 open roles · median 31 d
- SiFive · 55 open roles · median 73 d
- Arm Holdings · 49 open roles · median 101 d
How we counted: 1195 open Design Verification (Design Verification) roles from 95 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.