Senior / Staff Analog Design Engineer (PC) - Edinburgh, Scotland, United Kingdom

Originally posted 23 June 2026 by the employer — open 79 days.

Cirrus Logic is seeking a talented Senior/Staff Analog Design Engineer to help drive our audio and power management products.

About the role

This role involves developing high-performance mixed-signal integrated circuits for audio and power management products. You will be responsible for designing low-power, high-performance ICs in advanced CMOS processes.

What you'll do

• Develop advanced mixed-signal solutions from specification through architecture, design, integration, and production.
• Perform system-level modeling and analysis using tools such as MATLAB, Simulink, and Spectre.
• Design and implement high-performance analog and mixed-signal circuits at the transistor level.
• Lead design integration, ensuring robust interaction across system- and block-level implementations.
• Conduct hands-on silicon validation, lab evaluation, and debug to enable successful bring-up and learning.
• Support post-silicon activities, including validation, characterization, and production testing.

What you'll need

• Bachelor’s or Master’s degree in Electrical/Electronic Engineering (or equivalent) with relevant industry experience.
• Strong understanding of analog design flows, including architecture definition, circuit design, and chip integration.
• Proven expertise in CMOS analog and mixed-signal circuit design, particularly for low-power, high-performance applications.
• Solid knowledge of control theory as applied to circuit and system design.
• Strong understanding of inductive and/or capacitive power converters.
• Proficiency with high-level modeling and simulation tools such as MATLAB, Simulink, and LTspice.
• Experience designing across multiple CMOS processes, including advanced technology nodes.
• Practical lab experience, including silicon bring-up, testing, and debugging using standard measurement equipment.

Skills: mixed-signal solutions, power converters, transistor level design, silicon validation, control theory