Senior SoC Power Modeling Engineer - TX, Austin, United States
$156,100 - $267,600 USD yearly
Originally posted 23 June 2026 by the employer.
Pre-silicon power modeling and analysis for Embedded x86 SoC platforms.
About the role
Pre-silicon power modeling and analysis for Embedded x86 SoC platforms. This role defines use-case-driven power expectations, builds SoC-level power models from IP inputs, and enables EDC/TDC, voltage-frequency (VF), and PPA trade-off decisions early in the design cycle.
What you'll do
- Develop and maintain SoC-level power models for Embedded x86 platforms using IP-level inputs across CPU, GPU, fabric, memory, and I/O. - Create use-case-driven power models representing automotive, industrial, edge computing, and customer-specific embedded workloads, translating activity factors, concurrency, residency, and DVFS states into model inputs. - Build and maintain Voltage-Frequency (VF) curves across operating corners and derive EDC, TDC, and current limits based on modeled workloads and platform constraints. - Integrate IP-level power models into cohesive SoC-level frameworks while verifying consistency across clocking, power states, gating, and DVFS assumptions. - Partner with SoC and power architects to evaluate power/performance/area trade-offs, bounding-box analysis, and product configurations. - Support pre-silicon to post-silicon correlation of power models by refining models using silicon data, profiling, and validation feedback.
What you'll need
- BS or MS in Electrical Engineering, Computer Engineering, or related field. - Professional experience in power modeling, power estimation, or SoC power analysis. - Hands-on experience building SoC-level power models from IP-level inputs. - Strong understanding of SoC power architecture, DVFS, static vs dynamic power components, and EDC / TDC / electrical and thermal constraints. - Experience creating and analyzing VF curves.
Nice to have
- Experience with Embedded or Automotive SoCs. - Familiarity with x86 CPU, GPU, memory, and fabric power behaviors. - Exposure to power modeling tools, spreadsheets, or internal frameworks used for pre-silicon estimation. - Experience with workload-driven modeling and benchmark abstraction. - Strong analytical and scripting skills, with Python preferred. - Prior involvement in power correlation with silicon.
This role has been open 121 days — well above the 70-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Design Verification
|
Open roles in category
115
|
Median days open
70 d
|
Median salary
$185k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (115 roles · 31 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 115 |
| Open roles in the wider Silicon Validation & Test family | 143 | 2256 · 113 employers |
| Median days open | 70 d | 70 d (same as this employer) |
| Median salary (USD postings) | — | $185k |
Who's hiring in this category
- Qualcomm · 19 open roles · median 44 d
- AMD (this employer) · 15 open roles · median 70 d
- NVIDIA · 13 open roles · median 72 d
- Graphcore · 11 open roles · median 128 d
- Altera · 5 open roles · median 64 d
- Micron Technology · 5 open roles · median 218 d
How we counted: 115 open Post-Silicon Validation (Design Verification) roles from 31 employers tracked in the SemiconductorJobs index, counted 23 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.