$168,000 - $322,000 USD yearly
Manage GPU product bring-up spanning FinFET silicon, ATE test content, and Chip-On-Wafer-On-Substrate assembly.
Originally posted 2 November 2026 by the employer.
About the role
As a Senior Silicon Product Development Engineer in the GPU PDE team, you will manage product bring-up from pre-silicon through NPI bring-up and final market launch. You will manage complex schedules and resolve technical issues across characterization, test development, and manufacturing.
What you'll do
- Own the development and implementation of ATE test content for the GPU product line.
- Develop and maintain project plans to strictly adhere to market delivery timelines.
- Impact manufacturing yields, minimize excess, and accurately predict test durations while analyzing characterization outcomes.
- Manage key vendor relationships, particularly with Foundry, Assembly, and Memory vendors.
- Collaborate closely with Supply and Demand program management to meet chip quality standards.
What you'll need
- Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or equivalent experience.
- 7+ years of direct PDE experience.
- Track record in ASIC Mixed Signal build, characterization, and qualification of BIST and SCAN DFT methodologies.
- Working knowledge of advanced silicon process technology such as FinFET.
- Hands-on experience in Chip-On-Wafer-On-Substrate assembly, silicon GPU Product Engineering, and HBM memory vendor management.
Skills: ATE, CoWoS, FinFET, DFT, HBM, BIST
More semiconductor jobs: NVIDIA jobs · Product engineer jobs · California jobs
This role has been open 0 days — well below the 57-day median for Product Engineering roles.
Product Engineering · Yield Engineering
|
Open roles in category
112
|
Median days open
57 d
|
Category median salary (all employers)
$141k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (112 roles · 37 employers) |
|---|---|---|
| Open roles in this specialty | 5 | 112 |
| Open roles in the wider Silicon Validation & Test family | 103 | 2324 · 110 employers |
| Median days open | 66 d | 57 d (+9 d vs this employer) |
| Median salary (USD postings) | — | $141k |
Skills observed across this category: ATE, CoWoS, FinFET, DFT, HBM, BIST
Who's hiring in this category
- Micron Technology · 13 open roles · median 84 d
- Infineon Technologies · 12 open roles · median 44 d
- Texas Instruments · 10 open roles · median 68 d
- Renesas Electronics · 9 open roles · median 36 d
- Skyworks · 8 open roles · median 5 d
- onsemi · 7 open roles · median 62 d
How we counted: 112 open Product Engineering (Yield Engineering) roles from 37 employers tracked in the SemiconductorJobs index, counted 3 Nov 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.