Senior Signal and Power Integrity Engineer - CA, Santa Clara, United States
$168,000 - $264,500 USD yearly
Originally posted 12 October 2026 by the employer.
About the role
This role involves developing Signal and Power Integrity solutions for complex system design problems, focusing on high-performance AI systems, graphic cards, and Tegra systems.
What you'll do
- Craft creative Signal and Power Integrity solutions to complex system design problems.
- Perform system-level power integrity simulations of high-performance AI systems, graphic cards, and Tegra systems.
- Collaborate with VLSI power and package/board design teams to design, optimize, and model power delivery networks (PDN) including dies, packages, boards, and voltage regulators.
- Create package and board PDN guidelines, conduct reviews, and perform post layout PI extractions.
- Optimize package, PCB, ASIC, and mixed signal circuits in a cross-functional environment.
What you'll need
- MS/PhD in Electrical Engineering or equivalent experience.
- 4+ years of industry experience.
- Strong technical background in applied electromagnetics, transmission line theory, and signal processing.
- Experience in power integrity for core power or I/O power.
- Strong understanding of how die/package/board decoupling impacts power supply noise across different frequency ranges.
- Knowledge of on-die current di/dt control techniques such as dynamic clocking and throttling.
- Hands-on experience with PowerSI, 3D modeling tools such as ANSYS HFSS/Q3D, 2.5D tools such as ANSYS SIwave, and 2D tools such as Ansys 2D.
Nice to have
- Familiarity with the SIMPLIS tool for regulator modeling.
- Experience in modeling the behavior of on-die di/dt control techniques.
- Knowledge of package/board/decoupling capacitor technology & design.
- Scripting for analysis automation.
Skills: signal integrity, power integrity, PDN, ANSYS HFSS, board design, package design
This role has been open 2 days — well below the 110-day median for Hardware Systems Engineering roles.
Hardware Systems Engineering · Serdes Highspeed
|
Open roles in category
88
|
Median days open
110 d
|
Median salary
$199k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (88 roles · 35 employers) |
|---|---|---|
| Open roles in this specialty | 15 | 88 |
| Open roles in the wider Software, Firmware & Systems family | 993 | 6141 · 145 employers |
| Median days open | 58 d | 110 d (−52 d vs this employer) |
| Median salary (USD postings) | — | $199k |
Skills observed across this category: signal integrity, power integrity, PDN, ANSYS HFSS, board design, package design
Who's hiring in this category
- NVIDIA (this employer) · 15 open roles · median 58 d
- Qualcomm · 10 open roles · median 189 d
- AMD · 6 open roles · median 114 d
- Keysight Technologies · 4 open roles · median 142 d
- Broadcom · 3 open roles · median 199 d
- Intel Corporation · 3 open roles · median 2 d
How we counted: 88 open Hardware Systems Engineering (Serdes Highspeed) roles from 35 employers tracked in the SemiconductorJobs index, counted 15 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Software, Firmware & Systems family row. Figures refresh nightly.