Senior Product Support Engineer / Team Lead (Memory Test Division - San Jose, CA
$117,600 USD yearly
Originally posted 20 October 2026 by the employer.
About the role
This position is based in San Jose, CA for the Teradyne Memory Division- Nextest. You will manage customer requests, escalations, and service emergencies while coordinating product support between field and factory teams.
What you'll do
- Manage customer requests, product escalations, and service emergencies, acting as a resource for less experienced colleagues. - Coordinate product upgrade strategies, spare level planning activities, and create and manage Field Replacement Units (FRUs) in the FRU database. - Provide product support for the installed base and support new and existing mechanical interface products. - Coordinate with Test Cell Partners including probers, handlers, and manipulators. - Support Engineering with customer floor plans, first site kit development, and outgoing quality inspection for spares and EAUs. - Create and provide Product Training Documents and Procedures to the field team, and coordinate PUP and PIP activities at international sites.
What you'll need
- 7-15 years of product support/service experience in the semiconductor test industry. - Bachelor's degree in Engineering or Computer Science or equivalent work experience. - Track record of committing to and meeting schedules with strong organizational and multi-tasking ability. - Ability to complete worldwide travel up to 20% to meet customers and conduct business with international partners.
Nice to have
- Bilingual proficiency in English and Mandarin Chinese.
This role has been open 0 days — well below the 33-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
556
|
Median days open
33 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | Teradyne | All employers we track in this specialty (556 roles · 77 employers) |
|---|---|---|
| Open roles in this specialty | 81 | 556 |
| Open roles in the wider Silicon Validation & Test family | 100 | 2244 · 112 employers |
| Median days open | 26 d | 33 d (−7 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne (this employer) · 79 open roles · median 27 d
- Renesas Electronics · 44 open roles · median 27 d
- Infineon Technologies · 43 open roles · median 41 d
- Micron Technology · 28 open roles · median 37 d
- Qualcomm · 28 open roles · median 33 d
- Texas Instruments · 24 open roles · median 28 d
How we counted: 556 open Silicon Test Engineering (DFT Test) roles from 77 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.