Senior Principal Test Development Engineer - Seremban, Negeri Sembilan, Malaysia
Verification, Validation & Test
Originally posted 21 September 2026 by the employer — open 0 days.
About the role
The role involves strategic and technical leadership across wafer sort, die-level test, package final test, and power module test development.
What you'll do
- Drive test architecture decisions from product concept through high-volume manufacturing.
- Lead test development activities for new products including Power MOSFETs, IGBTs, SiC MOSFETs, SiC Modules, GaN Discrete Devices, Intelligent Power Modules (IPM), and Mixed-signal power products.
- Architect and develop wafer sort and final test solutions.
- Design and implement test hardware, load boards, probe cards, interface boards, socket solutions, and automated test software.
- Develop test methodologies for high-voltage, high-current, fast-switching power semiconductor devices.
What you'll need
- Bachelor's degree in Electrical Engineering, Electronics Engineering, Physics, or equivalent.
- Minimum 10+ years of semiconductor test engineering experience.
- Minimum 5+ years of direct test development experience.
- Proven experience in power semiconductor products including Si, SiC, IGBT, and/or GaN technologies.
- Strong expertise in Wafer Sort Development, Final Test Development, Die-Level Characterization, Power Module Testing, Mixed-Signal Testing, Power Discrete Testing, Product Characterization, Statistical Analysis, Yield Optimization, and Root Cause Analysis.
- Proficiency in C/C++, Python, VBA / Automation Scripting, SQL, JMP, Minitab, Power BI, and Advanced Excel Analytics.
Nice to have
- Master's degree.
- Experience in SiC MOSFET and module development.
- Experience in GaN device testing and characterization.
- Experience in Driver IC and analog mixed-signal product testing.
- Experience in Automotive and industrial power products.
- Experience in High-voltage power module test development.
- Experience with Teradyne ETS Series, Advantest Platforms, Cohu / Multitest, or Accotest Platforms ATE Platforms.
Market context
This role has been open 0 days — well below the 24-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
411
|
Median days open
24 d
|
Median salary
$184k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | onsemi | All employers we track in this specialty (411 roles · 68 employers) |
|---|---|---|
| Open roles in this specialty | 10 | 411 |
| Open roles in the wider Silicon Validation & Test family | 74 | 2044 · 111 employers |
| Median days open | 23 d | 24 d (−1 d vs this employer) |
| Median salary (USD postings) | — | $184k |
Who's hiring in this category
- Teradyne · 50 open roles · median 3 d
- Infineon Technologies · 37 open roles · median 30 d
- Renesas Electronics · 33 open roles · median 31 d
- Micron Technology · 26 open roles · median 23 d
- Qualcomm · 24 open roles · median 19 d
- AMD · 19 open roles · median 27 d
How we counted: 411 open Silicon Test Engineering (DFT Test) roles from 68 employers tracked in the SemiconductorJobs index, counted 21 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.