Senior Principal Technologist – Memory - San Jose, California, United States

Originally posted 18 May 2026 by the employer.

About the role

As a Senior Principal Technologist – Memory, you will facilitate the development of data center memory solutions and drive the architecture and definition of future products. The position focuses on system architecture, SOC memory sub-system architecture, PCIe/CXL technologies, DRAM/memory architecture, and hardware-software co-design.

What you'll do

- Drive the architecture and definition of future data center memory products across silicon, system, and software domains. - Directly engage with customers and industry partners to pitch technical architectures, articulate concepts, and influence product features and roadmaps. - Address hyperscale data center bottlenecks through hardware-software co-design spanning silicon to application integration. - Evaluate technical use cases and build business cases for custom and standards-based connectivity and memory architectures. - Travel occasionally for customer engagements and industry events.

What you'll need

- BS in Electrical or Computer Engineering (MS or PhD preferred). - 10+ years of experience developing memory-related solutions and integrating them into systems or racks for data centers. - Deep experience with PCIe 5/6 and CXL, including protocol-level depth. - Expertise in OS software integration, including memory allocation and management. - Recent experience with silicon architecture and development, especially SOCs with memory controllers (DDR*, LPDDR*, HBM, etc.). - Deep understanding of memory components (such as DRAM) and datacenter system architecture. - Experience in a customer-facing role articulating technical concepts, building business cases, and leading cross-functional technical initiatives.

Nice to have

- Expertise in JEDEC-defined memory interface specifications. - Expertise in memory ECC and error handling. - Experience in product integration with BIOS, kernel, OS, tooling, and BMCs. - Experience with board and system design. - Existing engagement and network within industry organizations such as PCI-SIG, OCP, JEDEC, or CXL. - Hands-on silicon development experience.

Skills: system architecture, SOC memory sub-system, PCIe/CXL, DRAM/memory architecture, hardware-software co-design