$205,000 - $260,000 USD yearly
Originally posted 21 October 2026 by the employer.
Support Ethernet and PCIe high-speed connectivity solutions for AI infrastructure platforms.
About the role
Astera Labs is seeking a Senior Principal Engineer- Field Applications to serve as a technical partner to customers deploying high-speed connectivity solutions. In this role, you will lead critical customer support for Ethernet and PCIe products across AI infrastructure platforms.
What you'll do
- Lead technical engagements with strategic customers from architecture definition through deployment and production support. - Own customer escalations, establish action plans, and drive issues to closure with measurable outcomes. - Develop and execute system-level debug plans for Ethernet and PCIe connectivity issues, including link training, interoperability, compliance, and performance. - Analyze physical-layer behavior, signal-integrity symptoms, error logs, lab data, and system telemetry to isolate root causes. - Partner with engineering teams to reproduce field issues, influence product improvements, and communicate workarounds or corrective actions. - Create technical collateral, reference architectures, application notes, and enablement materials for customers and internal teams.
What you'll need
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related technical field. - 8–20 years of experience in field applications engineering, system engineering, product engineering, or a related domain. - Hands-on experience with Ethernet and/or PCIe systems, high-speed SerDes, link training, interoperability, and compliance. - Understanding of physical-layer concepts, signal integrity, board-level bring-up, lab instrumentation, and system-level debug. - Demonstrated ability to lead complex customer escalations, debug, and communicate technical concepts clearly. - Ability to work onsite in San Jose and travel to customer and partner locations as needed.
Nice to have
- Master’s degree in Electrical Engineering, Computer Engineering, or a related field. - Experience with PCIe Gen 5/6/7, high-speed Ethernet, retimers, redrivers, signal-conditioning, and scale-up or scale-out solutions. - Familiarity with server, accelerator, switch, NIC, storage, or other data-center platform architectures. - Experience developing reference designs, validation plans, interoperability strategies, or customer-facing technical documentation. - Record of influencing cross-functional teams and mentoring technical professionals.
Skills: Ethernet, PCIe, SerDes, link training, signal integrity
This role has been open 0 days — well below the 57-day median for Applications FAE roles.
Applications FAE · Serdes Highspeed
|
Open roles in category
89
|
Median days open
57 d
|
Median salary
$183k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Astera Labs | All employers we track in this specialty (89 roles · 23 employers) |
|---|---|---|
| Open roles in this specialty | 16 | 89 |
| Median days open | 68 d | 57 d (+11 d vs this employer) |
| Median salary (USD postings) | — | $183k |
Skills observed across this category: Ethernet, PCIe, SerDes, link training, signal integrity
Who's hiring in this category
- Astera Labs (this employer) · 16 open roles · median 67 d
- Synopsys · 16 open roles · median 35 d
- Keysight Technologies · 10 open roles · median 46 d
- Qualcomm · 8 open roles · median 73 d
- Microchip Technology · 7 open roles · median 41 d
- Marvell Technology · 5 open roles · median 179 d
How we counted: 89 open Applications FAE (Serdes Highspeed) roles from 23 employers tracked in the SemiconductorJobs index, counted 21 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.