Senior Photonic Layout Design Engineer - CA, Santa Clara, United States
$132,000 - $235,750 USD yearly
Originally posted 18 May 2026 by the employer. Relisted by the employer on 9 September 2026.
About the role
Take ownership of the physical design and verification of photonic integrated circuits (PICs), guiding designs from initial proof-of-concept phases to high-volume manufacturing readiness. Work within a multidisciplinary team focused on Silicon Photonics (SiPh) and SERDES products.
What you'll do
- Lead manual and automated layout designs for waveguides, modulators, photodetectors, and mixed-signal functions including high-speed/general I/Os and ESD structures. - Drive the tape-out process, including floor planning, waveguide routing, and mask data preparation. - Execute post-layout verification (DRC, LVS, fill, density) across multiple stepping versions and resolve layout-dependent issues prior to tape-out. - Own the layout of complex test structures, active/passive full loops, and certification vehicles with large Design of Experiments (DOEs) to optimize process windows. - Develop AI-assisted design methods, layout automation scripts, and custom Pcells to reduce development cycle times and customize DRC/LVS checking flows.
What you'll need
- BS, MS, or Ph.D. in Electrical Engineering, Physics, or a closely related field (or equivalent experience). - At least 12+ years of hands-on, full-chip layout design experience in semiconductor, analog, or silicon photonics industries. - Deep understanding of analog circuit layout, Silicon Photonic constraints, and device physics within advanced sub-micron CMOS and SiPh technologies. - Proven expertise with Cadence Virtuoso (Custom Layout, SDL) and industry-standard verification suites (Calibre, Hercules, ICV, Dracula, or Primeyield). - Strong proficiency in programming and scripting languages (Python, SKILL, Perl, TCL, or C++) for layout automation, file I/O, data processing, and tape-out flows. - Ability to optimize workflows using best-known methods (BKMs) and collaborate with integration and design rule teams to achieve high-yield manufacturing goals.
Skills: photonic integrated circuits, PIC, Silicon Photonic, Cadence Virtuoso, DRC, LVS
This role has been open 159 days — well above the 78-day median for Optical/Photonics IC Design roles.
Optical/Photonics IC Design · Photonics
|
Open roles in category
138
|
Median days open
78 d
|
Median salary
$197k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (138 roles · 30 employers) |
|---|---|---|
| Open roles in this specialty | 3 | 138 |
| Median days open | 78 d | 78 d (same as this employer) |
| Median salary (USD postings) | — | $197k |
Skills observed across this category: photonic integrated circuits, PIC, Silicon Photonic, Cadence Virtuoso, DRC, LVS
Who's hiring in this category
- Coherent Corp · 17 open roles · median 94 d
- GlobalFoundries · 16 open roles · median 80 d
- Lightmatter · 14 open roles · median 99 d
- Lumentum · 10 open roles · median 81 d
- Marvell Technology · 10 open roles · median 36 d
- Intel Corporation · 8 open roles · median 67 d
How we counted: 138 open Optical/Photonics IC Design (Photonics) roles from 30 employers tracked in the SemiconductorJobs index, counted 24 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.