Senior PDE, Test and Product Engineering, Client APU - TX, Austin, United States
Originally posted 24 August 2026 by the employer.
Develop test solutions for Client APU products.
About the role
The Senior Product Development Engineer is responsible for product bring-up, characterization, product definition, and production test solution development for semiconductor products. This role focuses on Client APU products.
What you'll do
- Develop and deploy production test solutions, including hardware, software, and test content.
- Drive silicon bring-up, characterization, product definition, margin analysis, and performance optimization from first silicon through production.
- Investigate and resolve silicon, test, yield, and manufacturing issues through structured root cause analysis and corrective actions.
- Partner with Design, DFT, Platform Validation, Manufacturing, and Hardware Infrastructure teams to ensure testability, quality, and production readiness.
- Analyze characterization, yield, and manufacturing data to support engineering decisions and continuous improvement initiatives.
- Validate ATE hardware and software, improve yield and test efficiency, and mentor junior engineers on product development best practices.
What you'll need
- Strong technical depth in semiconductor product engineering.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
Nice to have
- Experience supporting high-volume semiconductor products from development through production.
- Hands-on silicon debug and characterization, including PCIe and DDR signal integrity analysis.
- Knowledge of DFT methodologies, including BIST, loopback, boundary scan, and pattern generation flows.
- Experience analyzing characterization, yield, test, and manufacturing data to drive product improvements.
- Exposure to probe card, wafer sort, and final test hardware development and manufacturing operations.
- Proficiency with Python, Bash, Git, VS Code, data analytics, AI/ML techniques, and computer architecture concepts such as GPU or x86 systems.
This role has been open 52 days — well above the 29-day median for Silicon Test Engineering roles.
Silicon Test Engineering · DFT Test
|
Open roles in category
543
|
Median days open
29 d
|
Median salary
$173k
|
See the full market breakdown ▾Category comparison, and who else is hiring
| Metric | AMD | All employers we track in this specialty (543 roles · 76 employers) |
|---|---|---|
| Open roles in this specialty | 23 | 543 |
| Open roles in the wider Silicon Validation & Test family | 151 | 2216 · 112 employers |
| Median days open | 42 d | 29 d (+13 d vs this employer) |
| Median salary (USD postings) | — | $173k |
Who's hiring in this category
- Teradyne · 71 open roles · median 23 d
- Renesas Electronics · 44 open roles · median 23 d
- Infineon Technologies · 41 open roles · median 38 d
- Qualcomm · 28 open roles · median 28 d
- Micron Technology · 27 open roles · median 36 d
- Texas Instruments · 24 open roles · median 23 d
How we counted: 543 open Silicon Test Engineering (DFT Test) roles from 76 employers tracked in the SemiconductorJobs index, counted 16 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.