Senior Memory Subsystem Architect - Bengaluru, India
Originally posted 7 August 2026 by the employer.
About the role
This role involves optimizing performance, area, complexity, and power for memory systems in SoC designs. You will contribute to products tailored for Data center, Autonomous vehicles, deep-learning, and gaming.
What you'll do
- Develop architecture and micro-architecture to improve memory system optimization.
- Perform performance modeling and simulation to enhance memory system efficiency.
- Implement and maintain high-level performance and functional models.
- Analyze benchmarks, application workloads, and performance simulation results for micro-architectural optimizations.
- Debug performance and functional issues using high-level models, RTL simulation, and silicon.
- Collaborate with ASIC design and verification, software, product development, and marketing teams to develop comprehensive solutions.
What you'll need
- Master degree or equivalent experience in Electrical Engineering, Computer Science, Computer Engineering or related field.
- 4+ years of work experience in SoC Architecture and development, specifically in one or more domains of MMU, address translation, memory caching, interconnects, and DRAM controllers.
Skills: memory subsystem architecture, performance modeling, MMU, DRAM controllers, interconnects, caching
This role has been open 58 days — well below the 75-day median for SoC/Chip Architecture roles.
SoC/Chip Architecture · SOC Architecture
|
Open roles in category
442
|
Median days open
75 d
|
Median salary
$236k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (442 roles · 64 employers) |
|---|---|---|
| Open roles in this specialty | 57 | 442 |
| Open roles in the wider Digital Design & Verification family | 225 | 3109 · 114 employers |
| Median days open | 59 d | 75 d (−16 d vs this employer) |
| Median salary (USD postings) | — | $236k |
Skills observed across this category: memory subsystem architecture, performance modeling, MMU, DRAM controllers, interconnects, caching
Who's hiring in this category
- Qualcomm · 71 open roles · median 82 d
- NVIDIA (this employer) · 57 open roles · median 59 d
- AMD · 36 open roles · median 61 d
- Arm Holdings · 27 open roles · median 102 d
- Renesas Electronics · 22 open roles · median 59 d
- NXP Semiconductors · 20 open roles · median 104 d
How we counted: 442 open SoC/Chip Architecture (SOC Architecture) roles from 64 employers tracked in the SemiconductorJobs index, counted 5 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Digital Design & Verification family row. Figures refresh nightly.