Senior Memory Design Engineer - San Jose, CA, United States
$139,000 - $295,000 USD yearly
Originally posted 6 October 2026 by the employer.
About the role
This role involves the architecture, circuit design, implementation, and validation of DRAM memory products, including LPDDR, DDR, and future memory technologies.
What you'll do
- Develop new product opportunities by assisting with the design, layout, and optimization of memory/logic/analog circuits.
- Oversee and manage the layout process, including floor-planning, placement, and routing.
- Perform parasitic modeling and assist in design validation, reticle experiments, and tape-out revisions.
- Conduct verification processes with modeling and simulation using industry standard simulators.
- Debug silicon issues and perform root-cause analysis.
- Develop models and methodologies for design validation.
What you'll need
- Experience with memory/logic/analog circuits.
- Proficiency in layout process, floor-planning, placement, and routing.
- Knowledge of parasitic modeling.
- Experience with design validation, reticle experiments, and tape-out revisions.
- Ability to perform verification processes with modeling and simulation.
- Experience with silicon issues debugging and root-cause analysis.
Skills: memory/logic/analog circuits, layout process, floor-planning, parasitic modeling, design validation, silicon issues
This role has been open 3 days — well below the 65-day median for Memory Design roles.
Memory Design · Memory Design
|
Open roles in category
303
|
Median days open
65 d
|
Median salary
$205k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Micron Technology | All employers we track in this specialty (303 roles · 29 employers) |
|---|---|---|
| Open roles in this specialty | 153 | 303 |
| Median days open | 87 d | 65 d (+22 d vs this employer) |
| Median salary (USD postings) | — | $205k |
Skills observed across this category: memory/logic/analog circuits, layout process, floor-planning, parasitic modeling, design validation, silicon issues
Who's hiring in this category
- Micron Technology (this employer) · 153 open roles · median 86 d
- Synopsys · 33 open roles · median 49 d
- Qualcomm · 18 open roles · median 92 d
- Broadcom · 17 open roles · median 50 d
- SanDisk · 17 open roles · median 36 d
- NVIDIA · 8 open roles · median 59 d
How we counted: 303 open Memory Design (Memory Design) roles from 29 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there. Figures refresh nightly.