Senior Mask Layout Design Engineer - United States
Originally posted 4 September 2026 by the employer.
Join a team responsible for physical layout for PLLs and high speed I/O circuits.
About the role
This role involves performing physical layout for challenging high-speed mixed-signal circuit designs, specifically mixed-signal functions like PLLs and high speed I/O circuits, using sub-micron CMOS technologies.
What you'll do
- Perform physical layout for mixed-signal functions like PLLs, high speed I/O circuits, general I/O's, ESD structures designs in sub-micron CMOS technologies using Cadence tools.
- Work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.
- Perform floor planning and custom layout.
- Verify designs against design rules and schematics.
- Run and debug DRC and LVS.
What you'll need
- BSEE or equivalent experience.
- Minimum of 5+ years of relevant mask design / layout experience.
- Deep understanding of analog circuit layout concepts in submicron CMOS technologies.
- Expertise with Cadence custom circuit design tools, particularly Virtuoso.
- Experience running and debugging DRC and LVS with verification tools such as Dracula, Hercules, Calibre, Primeyield.
- Proficiency in scripting languages like perl, python, skill.
- Knowledge of DRC and LVS checking flows and ability to customize DRC and LVS decks.
Skills: mask layout, mixed-signal, PLL, high speed I/O, Cadence Virtuoso
This role has been open 25 days — well below the 92-day median for Mixed-Signal Design roles.
Mixed-Signal Design · Mixed Signal
|
Open roles in category
153
|
Median days open
92 d
|
Median salary
$178k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | NVIDIA | All employers we track in this specialty (153 roles · 42 employers) |
|---|---|---|
| Open roles in this specialty | 11 | 153 |
| Open roles in the wider Analog & Mixed-Signal family | 31 | 1385 · 107 employers |
| Median days open | 52 d | 92 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $178k |
Skills observed across this category: mask layout, mixed-signal, PLL, high speed I/O, Cadence Virtuoso
Who's hiring in this category
- Analog Devices · 24 open roles · median 77 d
- Infineon Technologies · 14 open roles · median 80 d
- NVIDIA (this employer) · 11 open roles · median 53 d
- SiTime · 11 open roles · median 189 d
- Qualcomm · 8 open roles · median 57 d
- Broadcom · 7 open roles · median 41 d
How we counted: 153 open Mixed-Signal Design (Mixed Signal) roles from 42 employers tracked in the SemiconductorJobs index, counted 30 Sept 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Analog & Mixed-Signal family row. Figures refresh nightly.