Senior Manager - Silicon Debug and Validation - Austin, United States
Originally posted 8 October 2026 by the employer.
About the role
This role involves managing a team responsible for the bringup and validation of debug features and tools, triage of failures, and Si validation and characterization, specifically for Apple SoCs.
What you'll do
- Manage a team of engineers and engineering managers focusing on debug feature validation and failure triage.
- Make debug features and tools available for Apple R&D teams and debug critical issues from SiVal, Factory, and Software testing.
- Develop intimate knowledge of the Apple SW stack, build flows/automation, and custom debug builds.
- Collaborate with teams across Apple to resolve cross-functional issues and prioritize team work.
- Engage in technical details, provide guidance, and represent the team to executives and partner organizations.
- Promote Apple culture and cultivate a team culture aligned with business needs.
What you'll need
- BS degree with a minimum of 15 years of relevant industry experience.
- Experience managing teams of 20+ engineers.
Nice to have
- Demonstrated proficiency in HW/SW interaction, Validation at scale, and characterization.
- Demonstrated proficiency in automation frameworks.
- Experience in FPGA- and Prototype HW-based Validation and Debug.
- Demonstrated ability to grow and develop managers and senior technical contributors.
- Strong scripting and data analysis experience.
- Ability to present plans, status and issues to executive leadership.
Skills: Silicon Debug, Validation, Bringup, Characterization, HW/SW interaction
This role has been open 0 days — well below the 41-day median for Post-Silicon Validation roles.
Post-Silicon Validation · Silicon Validation
|
Open roles in category
401
|
Median days open
41 d
|
Median salary
$174k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Apple | All employers we track in this specialty (401 roles · 63 employers) |
|---|---|---|
| Open roles in this specialty | 7 | 401 |
| Open roles in the wider Silicon Validation & Test family | 13 | 2215 · 111 employers |
| Median days open | 1 d | 41 d (−40 d vs this employer) |
| Median salary (USD postings) | — | $174k |
Skills observed across this category: Silicon Debug, Validation, Bringup, Characterization, HW/SW interaction
Who's hiring in this category
- AMD · 56 open roles · median 51 d
- Micron Technology · 41 open roles · median 35 d
- Qualcomm · 33 open roles · median 28 d
- Graphcore · 22 open roles · median 113 d
- NVIDIA · 21 open roles · median 28 d
- Microchip Technology · 20 open roles · median 66 d
How we counted: 401 open Post-Silicon Validation (Silicon Validation) roles from 63 employers tracked in the SemiconductorJobs index, counted 9 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Silicon Validation & Test family row. Figures refresh nightly.