Senior Manager, Package Design Engineering - Tempe, United States
Originally posted 2 October 2026 by the employer.
About the role
This role leads package technology development and new product introduction (NPI) execution for Renesas AI and data center infrastructure power products.
What you'll do
- Lead package technology development and NPI execution, including R&D and coordination with global OSAT partners.
- Manage the design and development of package and interconnect solutions for Smart Power Stages, Vertical Power Stages, Power Modules, and discrete FET packages.
- Support wide-bandgap SiC and GaN package development, DBC and AMB substrates, advanced interconnect technologies, wafer-level packaging, flip-chip, multi-chip modules, and power devices.
- Evaluate, select, and qualify materials, processes, assembly subcontractors (OSATs), and contract manufacturers.
- Partner with OSATs and contract manufacturers to plan and execute DOEs, optimize assembly processes, and establish process specifications.
- Establish, document, and maintain package design rules and engineering standards.
What you'll need
- Master's or Bachelor's Degree in Physics, Chemistry, Mechanical Engineering, Electrical Engineering, Materials Engineering, or a related discipline.
- 12 to 15 years of relevant semiconductor package development experience, including technical or project leadership responsibility.
- Strong understanding of power SiP/modules, wafer-level and flip-chip packaging methods, assembly processes, package and product qualification, and reliability methods.
- Experience with SPC, DOE, and statistical analysis tools.
- Demonstrated ability to lead cross-functional technical teams and manage multiple development programs.
Nice to have
- Doctorate is a plus.
- Knowledge of wire-bonding, multi-chip modules, SiC/GaN packaging, and advanced substrates.
Skills: package design rules, OSATs, assembly processes, wafer-level packaging, flip-chip interconnects
This role has been open 1 day — well below the 60-day median for Packaging Engineering roles.
Packaging Engineering · Advanced Packaging
|
Open roles in category
309
|
Median days open
60 d
|
Median salary
$165k
|
See the full market breakdown ▾Category comparison, skills in demand, and who else is hiring
| Metric | Renesas Electronics | All employers we track in this specialty (309 roles · 58 employers) |
|---|---|---|
| Open roles in this specialty | 20 | 309 |
| Open roles in the wider Process, Fab & Equipment family | 189 | 9571 · 109 employers |
| Median days open | 30 d | 60 d (−30 d vs this employer) |
| Median salary (USD postings) | — | $165k |
Skills observed across this category: package design rules, OSATs, assembly processes, wafer-level packaging, flip-chip interconnects
Who's hiring in this category
- KLA Corporation · 52 open roles · median 115 d
- Micron Technology · 36 open roles · median 36 d
- Renesas Electronics (this employer) · 20 open roles · median 29 d
- Infineon Technologies · 17 open roles · median 52 d
- onsemi · 15 open roles · median 25 d
- Intel Corporation · 14 open roles · median 62 d
How we counted: 309 open Packaging Engineering (Advanced Packaging) roles from 58 employers tracked in the SemiconductorJobs index, counted 4 Oct 2026. Specialty figures count only roles carrying this exact specialty label, so an employer's related work in neighbouring specialties is not included there — it is counted in the wider Process, Fab & Equipment family row. Figures refresh nightly.